EP910PC-35 vs EP910PC-15 Vergleich
Detaillierter Direktvergleich von EP910PC-35 von Altera und EP910PC-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910PC-35 | EP910PC-15 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,70 | $12,80 |
| Family | Classic EPLD | Altera Classic EPLD |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 24 | 24 |
| I/O Pins | 24 | — |
| Dedicated Inputs | 12 | 10 |
| Total Inputs | 36 | — |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 35 ns | — |
| Maximum Counter Frequency | 37 MHz | — |
| Internal Performance Frequency | 100 MHz | — |
| Technology | CMOS, UV-erasable/OTP | — |
| Versorgungsspannung | 5 V | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Gehäuse | 40-pin PDIP (Plastic DIP) | 24-pin PDIP (PDIP-24, 0.300 inch) |
| Montageart | Through-Hole | Through-Hole |
| Architecture | PAL-type sum-of-products, AND/OR array | — |
| Programming Method | UV-erase (ceramic) / OTP (plastic), A+PLUS / MAX+PLUS tools | Altera Logic Programmer card |
| Compliance / RoHS | [DATA_NEEDED: RoHS status - legacy part] | — |
| Usable Gates | — | 900 |
| Maximum Pin-to-Pin Delay (tpd) | — | 15 ns |
| Counter Frequency (fCNT) | — | 100 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Supply Current (Icc) | — | 80 mA typical |
| Dedicated I/O Pins | — | 12 |
| Process Technology | — | CMOS, UV-erasable |
| RoHS-Status | — | [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] |
| MSL-Level | — | Not applicable (through-hole) |