EPC144L120 vs EPC1441LI20 Vergleich
Detaillierter Direktvergleich von EPC144L120 von Intel und EPC1441LI20 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC144L120 | EPC1441LI20 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | Memory ICs |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $17,40 | $8,10 |
| Manufacturer | Intel (formerly Altera) | — |
| Device Family | EPC1441 Configuration Device | — |
| Device Function | Serial Configuration Memory for Altera FPGAs | — |
| Compatible FPGAs | ACEX 1K, APEX 20K, FLEX 10K, Mercury | — |
| Package Code | L120 = 120-pin QFP | — |
| Package Type | QFP-120 (Plastic Quad Flat Pack) | — |
| Configuration Interface | Single-wire serial (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) | Altera 4-pin serial (DATA, DCLK, nCONFIG, nSTATUS) |
| Speichertyp | OTP (One-Time Programmable) CMOS | OTP Configuration PROM (PROM) |
| Configuration Storage | [DATA_NEEDED: configuration bit density in bits] | — |
| Versorgungsspannung | [DATA_NEEDED: VCC nominal range] | 3.3 V |
| I/O Voltage Compatibility | 3.3 V and 5 V (per Altera datasheet family) | — |
| Programming Method | Altera programming hardware via JTAG-like interface | One-Time-Programmable via Altera programming hardware |
| Betriebstemperatur | [DATA_NEEDED: industrial / commercial grade] | -40 C to +85 C (industrial) |
| Montageart | Surface Mount (QFP) | — |
| MSL-Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| RoHS-Status | [DATA_NEEDED: RoHS compliant status] | [DATA_NEEDED: RoHS compliance status] |
| Lebenszyklusstatus | Not Recommended for New Designs (NRND) per Intel product page | — |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free status] | — |
| Density | — | 441 kbits (440,800 bits) |
| Number of Words | — | 440,800 |
| Bits per Word | — | 1 bit |
| Supported FPGA Families | — | ACEX, APEX 20K / 20KC / 20KE, FLEX 10KE, FLEX 10KA, Mercury |
| Gehäuse | — | 20-pin PLCC (J-lead, 9x9 mm) |
| Pin Pitch | — | 1.27 mm |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Time | — | Depends on FPGA bitstream length and DCLK frequency |