EPC16UI8B vs EPC16SI16N Vergleich
Detaillierter Direktvergleich von EPC16UI8B von Altera und EPC16SI16N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPC16SI16N - 16Mb Enhanced Configuration Device, 16-SOIC | Altera / Intel
EPC16SI16N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPC16UI8B | EPC16SI16N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $12,50 | $4,35 |
| Memory Density | 16 Mbit (2 MB) | — |
| Funktion | Enhanced Configuration Device for SRAM-based LUT FPGAs | — |
| Schnittstelle | Active Serial (AS), JTAG | Altera enhanced serial configuration (DCLK, DATA, nCS, nRESET, nSTATUS) |
| Versorgungsspannung | 2.5 V / 3.3 V | — |
| Gehäuse | USON-8 / WSON-8 (8-pin) | 16-pin SOIC (300 mil, 'SI' suffix) |
| Betriebstemperatur | -40 C to +85 C (Industrial) | -40 C to +85 C (industrial, 'SI' suffix) |
| Architecture | Multi-page flash, up to 8 pages | — |
| In-System Programming | Yes (JTAG) | — |
| Compression Support | Yes (bitstream decompression) | — |
| Remote System Upgrade | Yes | — |
| Cascade Support | Yes (multi-FPGA) | — |
| Montageart | Surface Mount | Surface Mount |
| Silicon Revision | B (second revision) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Speichertyp | — | Non-volatile flash (enhanced configuration device) |
| Speichergröße | — | 16 Mb (16,777,216 bits) |
| Programming Interface | — | JTAG (IEEE 1149.1 boundary scan) |
| Maximum Operating Frequency | — | 40 MHz (fast configuration mode) |
| Betriebsversorgungsspannung | — | 3.3 V (typ) |
| Lead-Free / Finish | — | Lead-free (matte tin), 'N' suffix |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| In-System Programmability | — | Yes (via JTAG, multiple reprogramming cycles) |
| Compatible FPGA Series | — | Altera Stratix II, Stratix III, Cyclone, Cyclone II, Cyclone III |
| Configuration Daisy-Chaining | — | Supported (multiple devices / multiple FPGAs) |
| On-Chip Charge Pump | — | Integrated (no external VPP required) |