EPF10K250EFC672-2 vs EPF10K250EFI672-3 Vergleich
Detaillierter Direktvergleich von EPF10K250EFC672-2 von Intel und EPF10K250EFI672-3 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPF10K250EFC672-2 | EPF10K250EFI672-3 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $108,00 | $125,00 |
| Family | FLEX 10KE | FLEX 10KE |
| Logic Elements | 12,480 | [DATA_NEEDED: exact LE count] |
| Typical Gates | 250,000 | 250,000 |
| Embedded Array Blocks (EABs) | 20 | 12 |
| Maximum User RAM Bits | 40,960 | — |
| User I/Os | 470 | — |
| Gehäuse | 672-BGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch | 672-ball FineLine BGA, 1.27 mm pitch |
| Pin-Anzahl | 672 | — |
| Propagation Delay | 0.4 ns | — |
| Betriebstemperatur | 0 C to +70 C (Commercial) | 0 °C to 70 °C (commercial) |
| Core Supply Voltage | 2.3 V (typical 2.5 V) | 2.5 V |
| I/O Standard Support | 1.8 V, 2.5 V, 3.3 V (multi-volt I/O) | — |
| Logic Family | CMOS, SRAM-based | — |
| Configuration | SRAM, in-system programmable (ISP) via JTAG | — |
| Boundary Scan | IEEE 1149.1 (JTAG) compliant | — |
| Montageart | Surface Mount | — |
| RoHS-Status | Non-RoHS Compliant (per Fly-Wing listing) | Unknown (legacy Altera non-RoHS device) |
| User I/O Pins | — | 470 |
| EAB Dual-Port Width | — | Up to 16-bit |
| Maximum EAB Memory | — | [DATA_NEEDED: bits per EAB] |
| Propagation Delay (tpd) | — | 0.4 ns (typical, -3 speed grade) |
| I/O Supply Voltage | — | 2.5 V / 3.3 V (multiVolt I/O) |
| Process Technology | — | CMOS, SRAM-based configuration |
| Configuration Interface | — | JTAG / ByteBlaster (EPC2/EPC8 PROM) |
| Design Entry | — | EDIF 2 0 0 / 3 0 0, LPM, VHDL, Verilog |