EPM5016DC-17 vs EPM5016DC-20 Vergleich
Detaillierter Direktvergleich von EPM5016DC-17 von Altera und EPM5016DC-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5016DC-17 | EPM5016DC-20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $16,20 | $16,50 |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 16 | 16 |
| Logic Elements | [DATA_NEEDED: LE count for MAX 5000 family] | — |
| User I/O Pins (max) | 24 | — |
| Propagation Delay (tPD) | 17 ns | 20 ns |
| Counter Frequency (fCNT) | 67 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| I/O Standard | TTL-compatible | — |
| Process Technology | 0.75 micron CMOS EEPROM | CMOS, UV-erasable |
| Gehäuse | Ceramic DIP-24 (DC suffix) | — |
| Pin-Anzahl | 24 | — |
| Montageart | Through-hole | — |
| Betriebstemperatur | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| In-System Programmability | Yes (ByteBlaster / BitBlaster) | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| RoHS-Status | [DATA_NEEDED: confirmed compliance status from manufacturer] | [DATA_NEEDED: RoHS compliance] |
| Device Type | — | EPLD (UV-Erasable Programmable Logic Device) |
| Product Terms | — | 160 |
| Dedicated Inputs | — | 7 |
| I/O Pins | — | 8 |
| Maximale Taktfrequenz | — | 62.5 MHz |
| Maximum Supply Voltage | — | 5.25 V |
| Nominal Supply Voltage | — | 5.0 V |
| Architecture | — | PAL-type macrocell with Programmable Interconnect Array (PIA) |
| Package Type | — | 20-pin Ceramic DIP (Cerdip) with UV window |
| Package Suffix Code | — | DC = Ceramic DIP, Commercial |
| Speed Grade | — | -20 = 20 ns tPD |
| Programming Method | — | UV erase + EPROM-style programming via Altera programming hardware |