EPM5128GC-1 vs EPM5128GC Vergleich

Detaillierter Direktvergleich von EPM5128GC-1 von Altera und EPM5128GC von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5128GC-1 EPM5128GC
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $18,95 $19,20
Family MAX 5000 MAX 5000
Device Type UV-erasable CMOS CPLD —
Macrocells 128 128
Usable Gates 2,500 2,500
Dedicated Inputs 7 —
Maximum User I/O Pins 52 —
Nominal Supply Voltage 5 V —
Supply Voltage Range 4.75 V to 5.25 V —
Maximum Operating Frequency 62.5 MHz —
Propagation Delay (tPD) 16 ns (typical, -1 speed grade) —
Gehäuse PGA-96+ (Pin Grid Array, ceramic windowed) —
Technology CMOS, UV-erasable EPROM —
Betriebstemperatur -40C to +85C (industrial) —
IOL / IOH 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec]) —
Security Bit Programmable, prevents readback —
Programming Method UV erase + EPROM program (or device programmer) —
MSL-Level [DATA_NEEDED: MSL level] —
RoHS-Status [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy] [DATA_NEEDED: RoHS compliance]
Logic Elements / LABs — [DATA_NEEDED: LAB count]
User I/Os — 68
Package Type — WPGA (Windowed Ceramic Pin Grid Array)
Package Code — WPGA
Number of Terminals — 68
Terminal Form — PIN/PEG (through-hole PGA with alignment pegs)
Package Shape — Square
Temperature Grade — Commercial
Supply Voltage (Vcc) — 5 V
Process Technology — CMOS, UV-erasable
Architecture — EPLD, programmable AND/OR array with fixed OR plane
Propagation Delay (tpd) — [DATA_NEEDED: tpd in ns]
Maximum Frequency (fmax) — [DATA_NEEDED: fmax in MHz]
Programmable Security Bit — Yes
Configuration Memory — Non-volatile UV-EPROM (windowed ceramic)
Montageart — Through-Hole (PGA socket required)

Datenblätter & Ressourcen

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