EPM5128JI vs EPM5128JC Vergleich
Detaillierter Direktvergleich von EPM5128JI von Intel und EPM5128JC von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5128JI | EPM5128JC |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $23,95 | $9,75 |
| Device Family | MAX 5000 | — |
| Device Type | UV-erasable programmable logic device (PLD) | EPLD / CPLD |
| Macrocells | 128 | — |
| Propagation Delay (tPD) | 55 ns (typical) | 35 ns |
| Maximum Internal Frequency | 40 MHz | — |
| Process Technology | CMOS | CMOS EPROM |
| Programmable Technology | UV-erasable EPROM cell | — |
| Gehäuse | 68-terminal ceramic CQCC, windowed, J-leads | — |
| Operating Temperature Grade | Industrial ("I" suffix) | — |
| Programming | Altera MAX+plus II compatible programmer + UV eraser | — |
| RoHS-Status | Non-compliant (ceramic hermetic package) | [DATA_NEEDED: RoHS status - legacy part] |
| Lead Finish | Tin-lead (SnPb) over nickel | — |
| Montageart | Surface Mount (J-lead CQCC) | Surface Mount (PLCC socket or solder) |
| Logic Blocks | [DATA_NEEDED: number of LABs / logic array blocks] | — |
| User I/O Pins | [DATA_NEEDED: pin count of user I/Os] | [DATA_NEEDED: user I/O pin count] |
| Versorgungsspannung | [DATA_NEEDED: VCC range] | — |
| Standby Current | [DATA_NEEDED: ICCSB] | — |
| Product Family | — | MAX 5000 |
| Macrocell Count | — | 128 |
| Logic Elements | — | Programmable AND/OR/XOR array |
| Supply Voltage (VCC) | — | 5 V (typical) |
| Anzahl der Pins | — | 68 |
| Package Type | — | PLCC-68 (JLCC) ceramic, J-leaded |
| Dedicated Inputs | — | 8 |
| Configuration Memory | — | UV-erasable EPROM (windowed package) |
| Programming Interface | — | Altera MAX+PLUS II / A+PLUS / legacy programmer |
| Betriebstemperatur | — | Commercial 0C to +70C |
| Boundary Scan | — | JTAG IEEE 1149.1 (family feature) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |