EPM5130WM883B-1 vs EPM5130GM883B Vergleich
Detaillierter Direktvergleich von EPM5130WM883B-1 von Altera und EPM5130GM883B von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM5130WM883B-1 - 128-Macrocell UV PLD, 5V, CQFP-100 | Altera MAX 5000
EPM5130WM883B-1 ObsoleteAltera
EPM5130GM883B - Military CPLD, MAX 5000, 100-pin CPGA | Altera
EPM5130GM883B ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM5130WM883B-1 | EPM5130GM883B |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $128,00 | $108,00 |
| Device Family | MAX 5000 (Classic EPLD) | — |
| Manufacturer | Altera (now Intel PSG) | Altera (now Intel Programmable Solutions Group) |
| Logic Type | UV-Erasable Programmable Logic Device (EPLD) | — |
| Technology | CMOS, EPROM cell | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| Dedicated Inputs | 19 | — |
| I/O Pins | 48 (bi-directional) | — |
| Propagation Delay (tPD) | 55 ns | — |
| Maximum Clock Frequency (fMAX) | 33.3 MHz | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | — |
| External Clock Inputs | 1 global + shared inputs | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Package Type | CQFP-100, ceramic windowed (WM) | — |
| Military Screening | MIL-STD-883 Class B (883B suffix) | — |
| Betriebstemperatur | [DATA_NEEDED: military/industrial temperature grade] | -55C to +125C (MIL-STD-883B screening) |
| Programming Method | UV erase + EPROM programming | — |
| RoHS-Status | [DATA_NEEDED: confirmed RoHS for ceramic windowed CQFP] | [DATA_NEEDED: RoHS compliance status] |
| Montageart | Surface Mount (CQFP with J-leads) | Through-Hole (Pin Grid Array) |
| Series | — | MAX 5000 |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Usable Gates | — | 5,000 |
| User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| Gehäuse | — | 100-pin CPGA (S-CPGA-P100) |
| Pin-Anzahl | — | 100 |
| Versorgungsspannung | — | 5 V |
| Logic Family | — | CMOS, TTL-compatible |
| Configuration Memory | — | Non-volatile EEPROM |
| Propagation Delay | — | [DATA_NEEDED: tpd in ns] |
| Screening Level | — | MIL-STD-883B Class B |
| Lead Free Status | — | Lead free / RoHS Compliant (per ICComponents listing) |
| Programmable Security | — | Yes (security bit) |