EPM5192AJC-25 vs EPM5192AGC-15 Vergleich
Detaillierter Direktvergleich von EPM5192AJC-25 von Altera und EPM5192AGC-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192AJC-25 | EPM5192AGC-15 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,20 | $27,80 |
| Family | MAX 5000 EPLD | — |
| Manufacturer | Altera (now Intel PSG) | — |
| Macrocells | 192 | 192 |
| Propagation Delay (tPD) | 25 ns | 15 ns (pin-to-pin, -15 speed grade) |
| Gehäuse | PLCC-68 (windowed ceramic, AJC) | Ceramic Pin Grid Array (PGA) |
| Pin-Anzahl | 68 | — |
| Montageart | Surface Mount | — |
| Versorgungsspannung | 5 V (typical) | — |
| Logic Blocks | MAX 5000 LABs (Logic Array Blocks) | — |
| Programmable Pins | [DATA_NEEDED: number of user I/O pins] | — |
| Betriebstemperatur | [DATA_NEEDED: exact operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Erasure Method | UV-erasable (windowed ceramic package) | — |
| Programming Technology | EPROM (non-volatile) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] |
| Military Grade | Likely MIL-STD-883 processing per 'J' suffix in AJC marking (verify) | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Series | — | MAX 5000 |
| Logic Array Blocks | — | 16 (typical for 192-macrocell MAX 5000) |
| Maximum User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Total Inputs | — | 72 |
| Supply Voltage (VCC) | — | 5 V |
| Technology | — | CMOS, UV-erasable EPROM |
| Programming Method | — | UV erase + EPROM program (via Altera programmer) |
| Lebenszyklusstatus | — | Obsolete / Last Time Buy (per Altera legacy product list) |