EPM5192GC-1 vs EPM5192GC1 Vergleich
Detaillierter Direktvergleich von EPM5192GC-1 von Altera und EPM5192GC1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192GC-1 | EPM5192GC1 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $17,85 | $24,50 |
| Family | MAX 5000 (Classic) | MAX 5000 |
| Logic Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | — |
| Usable Gates | 3,750 | 3,750 |
| Logic Array Blocks (LABs) | 12 | — |
| Dedicated Inputs | 7 | — |
| User I/O Pins | 64 | — |
| Maximum Propagation Delay (tPD) | 40 ns | — |
| Maximum Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5 V |
| Process Technology | CMOS, UV-erasable / OTP | EPROM-based CMOS |
| Gehäuse | 100-pin Ceramic PGA (GC) | — |
| Montageart | Through-Hole (PGA) | Through-hole (PGA) |
| Configuration Method | UV-Erase / One-Time Programmable | — |
| Interconnect | Peripheral Interconnect Array (PIA) | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: operating temperature range] |
| RoHS-Status | [DATA_NEEDED: RoHS status] | unknown |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 192 |
| Maximum Operating Frequency | — | 62.5 MHz |
| Programming Technology | — | UV-Erasable / OTP EPROM |
| Package Type | — | Ceramic PGA (Pin Grid Array) |
| Logic Elements | — | 192 macrocells with AND/OR array |
| Propagation Delay | — | [DATA_NEEDED: tpd specification] |
| Anzahl der Pins | — | [DATA_NEEDED: pin count for GC1 PGA package] |
| Development Tool | — | Altera MAX+PLUS II |