EPM5192GC-1 vs EPM5192GC1 Comparaison
Comparaison détaillée côte à côte de EPM5192GC-1 par Altera et EPM5192GC1 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192GC-1 | EPM5192GC1 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $17,85 | $24,50 |
| Family | MAX 5000 (Classic) | MAX 5000 |
| Logic Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | — |
| Usable Gates | 3,750 | 3,750 |
| Logic Array Blocks (LABs) | 12 | — |
| Dedicated Inputs | 7 | — |
| User I/O Pins | 64 | — |
| Maximum Propagation Delay (tPD) | 40 ns | — |
| Maximum Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5 V |
| Process Technology | CMOS, UV-erasable / OTP | EPROM-based CMOS |
| Boîtier | 100-pin Ceramic PGA (GC) | — |
| Type de montage | Through-Hole (PGA) | Through-hole (PGA) |
| Configuration Method | UV-Erase / One-Time Programmable | — |
| Interconnect | Peripheral Interconnect Array (PIA) | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: operating temperature range] |
| Statut RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 192 |
| Maximum Operating Frequency | — | 62.5 MHz |
| Programming Technology | — | UV-Erasable / OTP EPROM |
| Package Type | — | Ceramic PGA (Pin Grid Array) |
| Logic Elements | — | 192 macrocells with AND/OR array |
| Propagation Delay | — | [DATA_NEEDED: tpd specification] |
| Nombre de broches | — | [DATA_NEEDED: pin count for GC1 PGA package] |
| Development Tool | — | Altera MAX+PLUS II |