EPM5192GI-1 vs EPM5192LI-1 Vergleich
Detaillierter Direktvergleich von EPM5192GI-1 von Altera und EPM5192LI-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192GI-1 | EPM5192LI-1 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $165,00 | $16,40 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | Complex Programmable Logic Device (CPLD) | EPLD (UV-Erasable/OTP Complex PLD) |
| Architecture | PAL-type, UV-erasable CMOS | EEPROM/EPROM-based, non-volatile, instant-on |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | [DATA_NEEDED: user I/O count for JLCC variant] |
| Dedicated Inputs | 7 | — |
| Logic Array Blocks (LABs) | 12 | — |
| Propagation Delay (tPD) | 25 ns | [DATA_NEEDED: tPD in ns at -1 grade] |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Betriebstemperatur | -40C to +85C (Industrial) | [DATA_NEEDED: industrial vs military range] |
| Gehäuse | 84-pin PGA (Pin Grid Array), windowed ceramic | — |
| Configuration Memory | UV-EPROM (windowed ceramic PGA) | — |
| Process Technology | CMOS | CMOS EPROM, UV-erasable |
| RoHS-Status | unknown (legacy UV-windowed package) | [DATA_NEEDED: RoHS status of ceramic LI variant] |
| Usable Gates | — | 3,750 |
| Maximum Toggle Frequency | — | 40 MHz |
| Versorgungsspannung | — | 5 V |
| Package Type | — | JLCC (windowed, ceramic, UV-erasable) |
| Speed Grade | — | -1 |
| Pin-Anzahl | — | [DATA_NEEDED: pin count of LI package] |
| Montageart | — | Surface Mount (JLCC with J-leads) |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| Lead Free | — | [DATA_NEEDED: lead-free] |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |