EPM5192JC vs EPM5192JI Vergleich
Detaillierter Direktvergleich von EPM5192JC von Intel und EPM5192JI von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192JC | EPM5192JI |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $16,40 | $9,75 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Series | EPM5192 (Classic / MAX-class) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Interconnect Architecture | Programmable Interconnect Array (PIA) | — |
| Process Technology | CMOS EPROM (UV-erasable) | — |
| Gehäuse | 68-pin PLCC (JC) windowed ceramic | 84-pin PLCC (windowed, J-suffix ceramic) |
| Montageart | Surface Mount | Surface Mount (PLCC socket recommended for UV erasure) |
| Programming Method | UV-erase + EPROM programmer | Altera MAX 5000 programming algorithm (device programmer) |
| Non-Volatile Configuration | Yes (EPROM cell array) | — |
| Logic Family | Classic CPLD (EPM5xxx series) | — |
| Betriebstemperatur | [DATA_NEEDED: commercial / industrial / military grade] | -40 C to +125 C (industrial, I-suffix) |
| Versorgungsspannung | [DATA_NEEDED: VCC nominal] | 4.75 V to 5.25 V (nominal 5 V) |
| Propagation Delay | [DATA_NEEDED: tpd spec by speed grade] | — |
| RoHS-Status | [DATA_NEEDED: original Altera marking not RoHS] | [DATA_NEEDED: RoHS status - pre-2010 part, likely non-compliant] |
| Family | — | MAX 5000 |
| Device Type | — | EPLD (UV-erasable CMOS Programmable Logic Device) |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Propagation Delay (tpd) | — | 55 ns |
| Technology | — | CMOS EPROM, UV-erasable |
| Erasure Method | — | UV exposure through windowed package |