EPM5192JC vs EPM5192JI 비교
다음의 상세 나란히 비교: EPM5192JC 제조: Intel 및 EPM5192JI 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5192JC | EPM5192JI |
|---|---|---|
| 브랜드 | Intel | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $16.40 | $9.75 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Series | EPM5192 (Classic / MAX-class) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Interconnect Architecture | Programmable Interconnect Array (PIA) | — |
| Process Technology | CMOS EPROM (UV-erasable) | — |
| 패키지 | 68-pin PLCC (JC) windowed ceramic | 84-pin PLCC (windowed, J-suffix ceramic) |
| 실장 유형 | Surface Mount | Surface Mount (PLCC socket recommended for UV erasure) |
| Programming Method | UV-erase + EPROM programmer | Altera MAX 5000 programming algorithm (device programmer) |
| Non-Volatile Configuration | Yes (EPROM cell array) | — |
| Logic Family | Classic CPLD (EPM5xxx series) | — |
| 동작 온도 | [DATA_NEEDED: commercial / industrial / military grade] | -40 C to +125 C (industrial, I-suffix) |
| 공급 전압 | [DATA_NEEDED: VCC nominal] | 4.75 V to 5.25 V (nominal 5 V) |
| Propagation Delay | [DATA_NEEDED: tpd spec by speed grade] | — |
| RoHS 상태 | [DATA_NEEDED: original Altera marking not RoHS] | [DATA_NEEDED: RoHS status - pre-2010 part, likely non-compliant] |
| Family | — | MAX 5000 |
| Device Type | — | EPLD (UV-erasable CMOS Programmable Logic Device) |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Propagation Delay (tpd) | — | 55 ns |
| Technology | — | CMOS EPROM, UV-erasable |
| Erasure Method | — | UV exposure through windowed package |