EPM5192LI84 vs EPM5192LC84 Vergleich
Detaillierter Direktvergleich von EPM5192LI84 von Altera und EPM5192LC84 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192LI84 | EPM5192LC84 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $21,60 | $15,95 |
| Device Family | MAX 5000 | — |
| Product Type | UV-Erasable/OTP Complex PLD (CPLD) | Complex Programmable Logic Device (CPLD) |
| Usable Gates | 3,750 gates | — |
| Macro Cells | 192 | — |
| Maximum Toggle Frequency | 40 MHz | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Supply Voltage (VCC) | 5 V (single supply) | — |
| User I/O Pins | 64 (max) | — |
| Betriebstemperaturbereich | -40 °C to +85 °C (industrial) | — |
| Package Type | 84-pin PLCC (J-lead, package code J84/QCCJ) | — |
| Montageart | Surface Mount (socket-compatible) | Surface Mount (Socket-compatible) |
| Configuration Memory | OTP / UV-erasable EPROM | EPROM / UV-Erasable |
| Programming Method | Stand-alone programmer (no JTAG on LI84 OTP variant) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | unknown |
| Logic Compatibility | TTL-compatible I/O | — |
| Family | — | MAX 5000 |
| Macrocells (Logic Cells) | — | 192 |
| Propagation Delay (tPD) | — | 55 ns |
| Process Technology | — | CMOS |
| Programmability | — | OTP / UV-Erasable |
| Gehäuse | — | LCC-84 (PQCC84, MS-018) |
| Pin-Anzahl | — | 84 |
| Betriebstemperatur | — | [DATA_NEEDED: operating temperature range] |
| Versorgungsspannung | — | [DATA_NEEDED: VCC range] |
| User I/O | — | [DATA_NEEDED: max user I/O count] |
| Programming Interface | — | JTAG / Altera legacy (MAX+PLUS II baseline) |
| MSL-Level | — | [DATA_NEEDED: MSL rating] |