EPM7128SQC100-10 vs EPM7128AETC100-10 Vergleich
Detaillierter Direktvergleich von EPM7128SQC100-10 von Altera und EPM7128AETC100-10 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM7128SQC100-10 | EPM7128AETC100-10 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,85 | $13,85 |
| Family | MAX 7000S | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | — |
| Logic Elements / Gates | 2,500 usable gates | — |
| Maximum User I/O | 84 | — |
| Logic Array Blocks (LABs) | 16 | 8 |
| Maximum Operating Frequency | 100 MHz | — |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | — |
| Versorgungsspannung | 5 V | — |
| Process Technology | 5V CMOS, EEPROM-based | — |
| Programmability | In-System Programmable (ISP) via JTAG | — |
| Gehäuse | 100-pin PQFP (Plastic Quad Flat Pack) | 100-pin TQFP (ET) |
| Betriebstemperatur | 0C to +70C (commercial) | -40C to +85C (commercial/industrial) |
| Montageart | Surface Mount | — |
| RoHS-Status | [DATA_NEEDED: rohs_status] | Compliant |
| Macrocells | — | 128 |
| User I/Os | — | 84 |
| Usable Gates | — | 2.5K |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Tolerance | — | 5.0 V tolerant |
| Program Technology | — | EEPROM (in-system programmable) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Lebenszyklusstatus | — | Obsolete (migrate to MAX II or MAX V) |