EPM9320BC356-15 vs EPM9320ALC84-15 Vergleich
Detaillierter Direktvergleich von EPM9320BC356-15 von Altera und EPM9320ALC84-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9320BC356-15 | EPM9320ALC84-15 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $31,20 | $9,95 |
| Family | MAX 9000 | MAX 9000 CPLD |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Macrocells | 320 | 320 |
| Pin-to-Pin Delay (max) | 15 ns | — |
| Process Technology | CMOS EEPROM | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5.0 V typical) | 4.75 V to 5.25 V (5 V nominal) |
| In-System Programmability | Yes (5.0-V ISP via JTAG) | — |
| JTAG Interface | IEEE Std. 1149.1 compliant | — |
| Gehäuse | 356-ball LBGA (BGA-356, 35x35 mm) | 84-pin PLCC (S-PQCC-J84, J-lead) |
| Montageart | Surface Mount | Through-hole / socket |
| Programmable Type | In System Programmable | — |
| Operating Temperature Grade | Commercial | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: rohs status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Usable Gates | — | 6000 |
| Propagation Delay (tPD) | — | 16 ns |
| User I/O | — | 56 |
| Logic Array Blocks (LABs) | — | 16 |
| Technology | — | CMOS, EEPROM-based configuration |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Betriebstemperatur | — | -40C to +85C (industrial) |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | — | MSL-3 (168 hours per fpgalink.com) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead free status] |
| RoHS3 Compliance | — | ROHS3 Compliant (per fpgalink.com listing) |