EPM9320BC356-15 vs EPM9320ALC84-15 对比

详细并排对比 EPM9320BC356-15 出自 Altera 和 EPM9320ALC84-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9320BC356-15 EPM9320ALC84-15
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $31.20 $9.95
Family MAX 9000 MAX 9000 CPLD
Device Type CPLD (Complex Programmable Logic Device) —
Architecture Multiple Array MatriX (MAX) - third generation —
Macrocells 320 320
Pin-to-Pin Delay (max) 15 ns —
Process Technology CMOS EEPROM —
Supply Voltage (VCC) 4.75 V to 5.25 V (5.0 V typical) 4.75 V to 5.25 V (5 V nominal)
In-System Programmability Yes (5.0-V ISP via JTAG) —
JTAG Interface IEEE Std. 1149.1 compliant —
封装 356-ball LBGA (BGA-356, 35x35 mm) 84-pin PLCC (S-PQCC-J84, J-lead)
安装类型 Surface Mount Through-hole / socket
Programmable Type In System Programmable —
Operating Temperature Grade Commercial —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: rohs status]
Lead-Free [DATA_NEEDED: lead-free status] —
Usable Gates — 6000
Propagation Delay (tPD) — 16 ns
User I/O — 56
Logic Array Blocks (LABs) — 16
Technology — CMOS, EEPROM-based configuration
Programming Interface — JTAG (IEEE 1149.1) / ISP
工作温度 — -40C to +85C (industrial)
湿敏等级(MSL) — MSL-3 (168 hours per fpgalink.com)
Lead-Free / Halogen-Free — [DATA_NEEDED: lead free status]
RoHS3 Compliance — ROHS3 Compliant (per fpgalink.com listing)

数据手册与资源

浏览全部产品 创建 BOM 获取报价