EPM9320BC356-15 vs EPM9320ALC84-15 Comparación
Comparación detallada lado a lado de EPM9320BC356-15 por Altera y EPM9320ALC84-15 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9320BC356-15 | EPM9320ALC84-15 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $31,20 | $9,95 |
| Family | MAX 9000 | MAX 9000 CPLD |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Macrocells | 320 | 320 |
| Pin-to-Pin Delay (max) | 15 ns | — |
| Process Technology | CMOS EEPROM | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5.0 V typical) | 4.75 V to 5.25 V (5 V nominal) |
| In-System Programmability | Yes (5.0-V ISP via JTAG) | — |
| JTAG Interface | IEEE Std. 1149.1 compliant | — |
| Encapsulado | 356-ball LBGA (BGA-356, 35x35 mm) | 84-pin PLCC (S-PQCC-J84, J-lead) |
| Tipo de montaje | Surface Mount | Through-hole / socket |
| Programmable Type | In System Programmable | — |
| Operating Temperature Grade | Commercial | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: rohs status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Usable Gates | — | 6000 |
| Propagation Delay (tPD) | — | 16 ns |
| User I/O | — | 56 |
| Logic Array Blocks (LABs) | — | 16 |
| Technology | — | CMOS, EEPROM-based configuration |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Temperatura de funcionamiento | — | -40C to +85C (industrial) |
| Nivel de sensibilidad a la humedad (MSL) | — | MSL-3 (168 hours per fpgalink.com) |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead free status] |
| RoHS3 Compliance | — | ROHS3 Compliant (per fpgalink.com listing) |