EPM9560RC208-18 vs EPM9560RC208-20 Vergleich
Detaillierter Direktvergleich von EPM9560RC208-18 von Altera und EPM9560RC208-20 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9560RC208-18 | EPM9560RC208-20 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Ende des Lebenszyklus | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $0,00 |
| Device Family | MAX 9000 (EPM9560) | MAX 9000 (EPM9560) |
| Logic Type | EEPROM-based Complex Programmable Logic Device (CPLD) | — |
| Usable Gates | 12,000 gates | 12,000 |
| Macrocells | 560 macrocells | 560 |
| Propagation Delay (tPD) | 18 ns (speed grade -18) | — |
| Maximum Operating Frequency | 117.6 MHz (family -15 grade reference) | — |
| Versorgungsspannung | 5 V | 5.0 V |
| I/O Voltage Compatibility | 3.3 V or 5 V | — |
| User I/O Lines | 149 I/O lines | — |
| Flip-Flops | 772 flip-flops | 772 |
| Gehäuse | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (28x28 mm) |
| Package JESD-30 Code | S-PQFP-G208 | — |
| Montageart | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile, no external config PROM) | — |
| Technology | CMOS | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lebenszyklusstatus | EOL / mature (per Altera product discontinuance notice) | — |
| Logic Array Blocks | — | 35 |
| User I/O Pins | — | 153 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Maximale Taktfrequenz | — | 100 MHz |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| I/O Standards | — | 5.0 V TTL/CMOS compatible |
| MSL-Level | — | [DATA_NEEDED: MSL level] |