EPM9560RC240-2 vs EPM9560RC240-10 Vergleich
Detaillierter Direktvergleich von EPM9560RC240-2 von Altera und EPM9560RC240-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9560RC240-2 | EPM9560RC240-10 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $180,00 | $0,00 |
| Family | MAX 9000 | MAX 9000 |
| Logic Elements | 560 macrocells | — |
| Usable Gates | 12,000 | 12,000 gates |
| Pin-to-Pin Delay | 2 ns (speed grade -2) | — |
| Maximum Frequency | 100 MHz | — |
| Versorgungsspannung | 5 V | 5 V |
| User I/O Count | 212 | — |
| Gehäuse | 240-pin RQFP (Metric QFP) | 240-pin RQFP (PowerQuad) |
| Montageart | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | — |
| Non-Volatile Configuration | Yes (EEPROM-based) | — |
| Betriebstemperatur | [DATA_NEEDED: commercial/industrial grade] | 0C to +70C (commercial) |
| RoHS-Status | Non-compliant (5V RQFP, pre-RoHS era) | ROHS3 Compliant |
| Lead-Free | No (legacy Sn/Pb process) | — |
| Logic Block Count | [DATA_NEEDED: LAB count] | — |
| Device Type | — | Complex Programmable Logic Device (CPLD) |
| Macro Cells | — | 560 |
| Logic Array Blocks (LABs) | — | 12 |
| Maximum System Frequency | — | 144.9 MHz |
| Pin-to-Pin Propagation Delay | — | 10 ns |
| Technology | — | CMOS EEPROM |
| User I/O Pins | — | 192 |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | — | 3 (168 Hours) |
| Configuration Memory | — | Non-volatile EEPROM (instant-on) |
| Manufacturer Standard Lead Time | — | 1-7 Days (distributor stock) |