EPM9560RC240-2 vs EPM9560RC240-10 Comparison
Detailed side-by-side comparison of EPM9560RC240-2 by Altera and EPM9560RC240-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC240-2 | EPM9560RC240-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Logic Elements | 560 macrocells | — |
| Usable Gates | 12,000 | 12,000 gates |
| Pin-to-Pin Delay | 2 ns (speed grade -2) | — |
| Maximum Frequency | 100 MHz | — |
| Supply Voltage | 5 V | 5 V |
| User I/O Count | 212 | — |
| Package | 240-pin RQFP (Metric QFP) | 240-pin RQFP (PowerQuad) |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | — |
| Non-Volatile Configuration | Yes (EEPROM-based) | — |
| Operating Temperature | [DATA_NEEDED: commercial/industrial grade] | 0C to +70C (commercial) |
| RoHS Status | Non-compliant (5V RQFP, pre-RoHS era) | ROHS3 Compliant |
| Lead-Free | No (legacy Sn/Pb process) | — |
| Logic Block Count | [DATA_NEEDED: LAB count] | — |
| Device Type | — | Complex Programmable Logic Device (CPLD) |
| Macro Cells | — | 560 |
| Logic Array Blocks (LABs) | — | 12 |
| Maximum System Frequency | — | 144.9 MHz |
| Pin-to-Pin Propagation Delay | — | 10 ns |
| Technology | — | CMOS EEPROM |
| User I/O Pins | — | 192 |
| Moisture Sensitivity Level (MSL) | — | 3 (168 Hours) |
| Configuration Memory | — | Non-volatile EEPROM (instant-on) |
| Manufacturer Standard Lead Time | — | 1-7 Days (distributor stock) |