EPM9560RCRC304-15 vs EPM9560RC304-15 Vergleich
Detaillierter Direktvergleich von EPM9560RCRC304-15 von Altera und EPM9560RC304-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9560RCRC304-15 | EPM9560RC304-15 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $9,40 |
| Device Family | MAX 9000 (EPM9560) | MAX 9000 |
| Logic Type | EEPROM-based Complex Programmable Logic Device (CPLD) | — |
| Macro Cells | 560 | — |
| Usable Gates | 12,000 | — |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Maximum Frequency | 117.6 MHz | — |
| Versorgungsspannung | 5.0 V | — |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | On-chip EEPROM (non-volatile) |
| In-System Programmability (ISP) | Yes, via IEEE Std. 1149.1 JTAG | — |
| JTAG Interface | IEEE Std. 1149.1 (built-in) | — |
| Gehäuse | 304-pin RQFP (PowerQuad Flat Pack) | 304-pin RQFP (Plastic Quad Flat Pack) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperaturbereich | [DATA_NEEDED: operating temperature range] | — |
| Number of User I/O Pins | [DATA_NEEDED: user I/O pin count] | — |
| Architecture | Third-generation Multiple Array MatriX (MAX) | Multiple Array MatriX (MAX), EEPROM-based |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | 16 |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: lead-free / RoHS compliance status] |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Macrocells | — | 560 |
| User I/O Pins | — | 212 (maximum) |
| Propagation Delay (tPD) | — | 15 ns (combinatorial, pin-to-pin) |
| Pin-Anzahl | — | 304 |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Standard | — | 5.0 V TTL / PCI-compliant |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Technology Node | — | High-performance CMOS, EEPROM process |
| Betriebstemperatur | — | [DATA_NEEDED: industrial/commercial temperature grade] |