EPM9560RI208-10 vs EPM9560RI208-10N Vergleich
Detaillierter Direktvergleich von EPM9560RI208-10 von Intel und EPM9560RI208-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM9560RI208-10 | EPM9560RI208-10N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $67,80 | $61,75 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 144 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| User I/O Pins | 212 (typical for 208-RQFP package) | — |
| Gehäuse | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (PQFP) |
| Montageart | Surface Mount | — |
| Betriebstemperatur | -40 °C to +85 °C (Industrial) | -40C to +85C (Industrial grade, "RI" suffix) |
| Programming Interface | IEEE 1149.1 (JTAG) / ISP | — |
| Configuration Memory | EEPROM, 100 erase/program cycles | On-chip EEPROM (non-volatile) |
| RoHS-Status | ROHS3 Compliant | ROHS3 Compliant (per fpgalink) |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | 3 (168 Hours) | — |
| Lead Time | 1-7 days (per fpgalink listing) | — |
| Architecture | — | CMOS EEPROM-based Multiple Array MatriX (MAX) |
| Macro Cells | — | 560 |
| Register Bits | — | 12,160 |
| User I/Os | — | 212 |
| Pin-to-Pin Delay | — | 10 ns (speed grade -10) |
| Maximum Frequency | — | 100 MHz to 125 MHz |
| Versorgungsspannung | — | 5 V |
| Programming Method | — | In-system via IEEE 1149.1 (JTAG) |
| MSL-Level | — | 3 (168 Hours) |