MPC852TVR50A-FR vs MPC859TVR133A Vergleich
Detaillierter Direktvergleich von MPC852TVR50A-FR von NXP Semiconductors und MPC859TVR133A von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
MPC852TVR50A-FR - 50MHz PowerQUICC MPU | NXP | Networking
MPC852TVR50A-FR ⚠ Letzte BestellmöglichkeitNXP Semiconductors
MPC859TVR133A - 133MHz PowerQUICC MPU, 32-Bit | NXP | 357-PBGA
MPC859TVR133A ✗ AbgekündigtSpezifikationsvergleich
| Parameter | MPC852TVR50A-FR | MPC859TVR133A |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Ende des Lebenszyklus |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $22,80 | $54,10 |
| Manufacturer | NXP Semiconductors (formerly Freescale Semiconductor) | NXP Semiconductors (formerly Freescale Semiconductor) |
| Processor Series | PowerQUICC MPC852T | — |
| Core Architecture | Power Architecture (MPC8xx) 32-bit | Power Architecture (32-bit) |
| Core Frequency | 50 MHz | — |
| Number of Cores | 1 (host) + 2 CPM RISC engines | 1 |
| Datenbusbreite | 32-bit | 32 bit |
| Integrated Ethernet MAC | 10/100 Mbps (Fast Ethernet) | — |
| Communication Engines | 2x RISC CPM (HDLC/SDLC, UART, SPI, I2C) | — |
| Memory Controller | SDRAM/SRAM/Flash (external bus, 32-bit) | — |
| Betriebstemperatur | 0C to +95C | 0C to +95C (commercial/industrial grade) |
| Gehäuse | 256-PBGA (23x23 mm, 1.0 mm pitch) | — |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Supply Voltage (Core) | 3.3 V | — |
| Compliance | RoHS (per -FR suffix packaging code, status [DATA_NEEDED: detailed RoHS test report]) | — |
| Part Suffix | -FR (NXP tray / lead-free packaging variant) | — |
| Mouser Product Category | Microprocessors - MPU Ethernet 50 MHz | — |
| Series | — | PowerQUICC, MPC8xx family |
| Core / Series Name | — | MPC8xx |
| Maximale Taktfrequenz | — | 133 MHz |
| Package Type | — | 357-PBGA (Plastic Ball Grid Array) |
| Package Dimensions | — | 25 x 25 mm |
| On-Chip Cache | — | 8 KB instruction / 8 KB data (per datasheet family) |
| Communication Channels | — | 4 SCC, 2 SMC, 1 FCC (typical MPC859T configuration) |
| Peripheral Interfaces | — | SPI, I2C, PCMCIA, IDMA, UART |
| RoHS-Status | — | See manufacturer PCN (legacy status) |
| Lifecycle | — | End-of-Life per NXP product page |