MPC852TVR50A-FR vs MPC859TVR133A Comparaison
Comparaison détaillée côte à côte de MPC852TVR50A-FR par NXP Semiconductors et MPC859TVR133A par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
MPC852TVR50A-FR - 50MHz PowerQUICC MPU | NXP | Networking
MPC852TVR50A-FR ⚠ Dernier achatNXP Semiconductors
MPC859TVR133A - 133MHz PowerQUICC MPU, 32-Bit | NXP | 357-PBGA
MPC859TVR133A ✗ Fin de vieComparaison des spécifications
| Paramètre | MPC852TVR50A-FR | MPC859TVR133A |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Dernier achat | Fin de vie |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $22,80 | $54,10 |
| Manufacturer | NXP Semiconductors (formerly Freescale Semiconductor) | NXP Semiconductors (formerly Freescale Semiconductor) |
| Processor Series | PowerQUICC MPC852T | — |
| Core Architecture | Power Architecture (MPC8xx) 32-bit | Power Architecture (32-bit) |
| Core Frequency | 50 MHz | — |
| Number of Cores | 1 (host) + 2 CPM RISC engines | 1 |
| Largeur du bus de données | 32-bit | 32 bit |
| Integrated Ethernet MAC | 10/100 Mbps (Fast Ethernet) | — |
| Communication Engines | 2x RISC CPM (HDLC/SDLC, UART, SPI, I2C) | — |
| Memory Controller | SDRAM/SRAM/Flash (external bus, 32-bit) | — |
| Température de fonctionnement | 0C to +95C | 0C to +95C (commercial/industrial grade) |
| Boîtier | 256-PBGA (23x23 mm, 1.0 mm pitch) | — |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Supply Voltage (Core) | 3.3 V | — |
| Compliance | RoHS (per -FR suffix packaging code, status [DATA_NEEDED: detailed RoHS test report]) | — |
| Part Suffix | -FR (NXP tray / lead-free packaging variant) | — |
| Mouser Product Category | Microprocessors - MPU Ethernet 50 MHz | — |
| Series | — | PowerQUICC, MPC8xx family |
| Core / Series Name | — | MPC8xx |
| Fréquence d'horloge maximale | — | 133 MHz |
| Package Type | — | 357-PBGA (Plastic Ball Grid Array) |
| Package Dimensions | — | 25 x 25 mm |
| On-Chip Cache | — | 8 KB instruction / 8 KB data (per datasheet family) |
| Communication Channels | — | 4 SCC, 2 SMC, 1 FCC (typical MPC859T configuration) |
| Peripheral Interfaces | — | SPI, I2C, PCMCIA, IDMA, UART |
| Statut RoHS | — | See manufacturer PCN (legacy status) |
| Lifecycle | — | End-of-Life per NXP product page |