MPC8536EAVTAQGA557 vs MPC8536EAVTAQG Vergleich
Detaillierter Direktvergleich von MPC8536EAVTAQGA557 von NXP Semiconductors und MPC8536EAVTAQG von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
MPC8536EAVTAQGA557 - PowerQUICC III MPU, 1GHz e500, 783-FCBGA | NXP
MPC8536EAVTAQGA557 ✓ AktivNXP Semiconductors
MPC8536EAVTAQG - PowerQUICC III 1GHz e500 MPU | NXP/Freescale
MPC8536EAVTAQG NrndSpezifikationsvergleich
| Parameter | MPC8536EAVTAQGA557 | MPC8536EAVTAQG |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | Aktiv | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $215,50 | $218,75 |
| Processor Type | MPC85xx PowerQUICC III | — |
| Core Architecture | PowerPC e500, 32-bit | — |
| Number of Cores | 1 | 1 |
| Maximum CPU Frequency | 1.0 GHz | — |
| Core Supply Voltage | 1.0 V | — |
| L1 Cache | 32 KB instruction / 32 KB data (per core) | — |
| Memory Controller | DDR2/DDR3 with ECC | — |
| Ethernet | 10/100/1000 Mbps, dual MAC | — |
| PCI Express | Yes (integrated) | — |
| SATA | SATA 2.0 | — |
| USB | USB 2.0 | — |
| SD/MMC | SDHC interface | — |
| Security Engine | Integrated SEC (hardware encryption) | — |
| Gehäuse | 783-ball FCBGA (29x29 mm) | 783-FCPBGA (29x29 mm) |
| Betriebstemperatur | 0 °C to +90 °C | [DATA_NEEDED: operating temperature range] |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Compliance | RoHS compliant | — |
| Processor Series | — | MPC85xx (PowerQUICC III) |
| Core | — | PowerPC e500, 32-bit |
| Maximale Taktfrequenz | — | 1.0 GHz |
| Datenbusbreite | — | 32 bit |
| Encryption Support | — | Yes ('E' suffix indicates encryption-enabled silicon) |
| Versorgungsspannung | — | [DATA_NEEDED: core/IO supply voltage] |
| Integrated Peripherals | — | QUICC Engine, DDR controller, Gigabit Ethernet, PCI Express |
| Instruction Set Architecture | — | Power Architecture (Book-E) |
| On-chip Cache | — | [DATA_NEEDED: L1/L2 cache configuration] |
| MSL-Level | — | [DATA_NEEDED: MSL rating] |
| RoHS-Status | — | [DATA_NEEDED: RoHS compliance] |