MPC8536EAVTAQGA557 vs MPC8536EAVTAQG Comparaison
Comparaison détaillée côte à côte de MPC8536EAVTAQGA557 par NXP Semiconductors et MPC8536EAVTAQG par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
MPC8536EAVTAQGA557 - PowerQUICC III MPU, 1GHz e500, 783-FCBGA | NXP
MPC8536EAVTAQGA557 ✓ ActifNXP Semiconductors
MPC8536EAVTAQG - PowerQUICC III 1GHz e500 MPU | NXP/Freescale
MPC8536EAVTAQG NrndComparaison des spécifications
| Paramètre | MPC8536EAVTAQGA557 | MPC8536EAVTAQG |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $215,50 | $218,75 |
| Processor Type | MPC85xx PowerQUICC III | — |
| Core Architecture | PowerPC e500, 32-bit | — |
| Number of Cores | 1 | 1 |
| Maximum CPU Frequency | 1.0 GHz | — |
| Core Supply Voltage | 1.0 V | — |
| L1 Cache | 32 KB instruction / 32 KB data (per core) | — |
| Memory Controller | DDR2/DDR3 with ECC | — |
| Ethernet | 10/100/1000 Mbps, dual MAC | — |
| PCI Express | Yes (integrated) | — |
| SATA | SATA 2.0 | — |
| USB | USB 2.0 | — |
| SD/MMC | SDHC interface | — |
| Security Engine | Integrated SEC (hardware encryption) | — |
| Boîtier | 783-ball FCBGA (29x29 mm) | 783-FCPBGA (29x29 mm) |
| Température de fonctionnement | 0 °C to +90 °C | [DATA_NEEDED: operating temperature range] |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Compliance | RoHS compliant | — |
| Processor Series | — | MPC85xx (PowerQUICC III) |
| Core | — | PowerPC e500, 32-bit |
| Fréquence d'horloge maximale | — | 1.0 GHz |
| Largeur du bus de données | — | 32 bit |
| Encryption Support | — | Yes ('E' suffix indicates encryption-enabled silicon) |
| Tension d'alimentation | — | [DATA_NEEDED: core/IO supply voltage] |
| Integrated Peripherals | — | QUICC Engine, DDR controller, Gigabit Ethernet, PCI Express |
| Instruction Set Architecture | — | Power Architecture (Book-E) |
| On-chip Cache | — | [DATA_NEEDED: L1/L2 cache configuration] |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |
| Statut RoHS | — | [DATA_NEEDED: RoHS compliance] |