MPC8536EAVTAQGA557 vs MPC8536EAVTAQG Comparación
Comparación detallada lado a lado de MPC8536EAVTAQGA557 por NXP Semiconductors y MPC8536EAVTAQG por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
NXP Semiconductors
MPC8536EAVTAQGA557 - PowerQUICC III MPU, 1GHz e500, 783-FCBGA | NXP
MPC8536EAVTAQGA557 ✓ ActivoNXP Semiconductors
MPC8536EAVTAQG - PowerQUICC III 1GHz e500 MPU | NXP/Freescale
MPC8536EAVTAQG NrndComparación de especificaciones
| Parámetro | MPC8536EAVTAQGA557 | MPC8536EAVTAQG |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Activo | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $215,50 | $218,75 |
| Processor Type | MPC85xx PowerQUICC III | — |
| Core Architecture | PowerPC e500, 32-bit | — |
| Number of Cores | 1 | 1 |
| Maximum CPU Frequency | 1.0 GHz | — |
| Core Supply Voltage | 1.0 V | — |
| L1 Cache | 32 KB instruction / 32 KB data (per core) | — |
| Memory Controller | DDR2/DDR3 with ECC | — |
| Ethernet | 10/100/1000 Mbps, dual MAC | — |
| PCI Express | Yes (integrated) | — |
| SATA | SATA 2.0 | — |
| USB | USB 2.0 | — |
| SD/MMC | SDHC interface | — |
| Security Engine | Integrated SEC (hardware encryption) | — |
| Encapsulado | 783-ball FCBGA (29x29 mm) | 783-FCPBGA (29x29 mm) |
| Temperatura de funcionamiento | 0 °C to +90 °C | [DATA_NEEDED: operating temperature range] |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Compliance | RoHS compliant | — |
| Processor Series | — | MPC85xx (PowerQUICC III) |
| Core | — | PowerPC e500, 32-bit |
| Frecuencia de reloj máxima | — | 1.0 GHz |
| Ancho del bus de datos | — | 32 bit |
| Encryption Support | — | Yes ('E' suffix indicates encryption-enabled silicon) |
| Tensión de alimentación | — | [DATA_NEEDED: core/IO supply voltage] |
| Integrated Peripherals | — | QUICC Engine, DDR controller, Gigabit Ethernet, PCI Express |
| Instruction Set Architecture | — | Power Architecture (Book-E) |
| On-chip Cache | — | [DATA_NEEDED: L1/L2 cache configuration] |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |
| Estado RoHS | — | [DATA_NEEDED: RoHS compliance] |