P5010NSN1QMB vs P5010NSN1MMB Vergleich

Detaillierter Direktvergleich von P5010NSN1QMB von NXP Semiconductors und P5010NSN1MMB von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter P5010NSN1QMB P5010NSN1MMB
Marke NXP Semiconductors NXP Semiconductors
Kategorie Microcontrollers Microcontrollers
Lebenszyklusstatus Aktiv Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $318,25 $205,00
Architecture Power Architecture e5500 (64-bit) —
Core Count 1 core —
Maximum Core Frequency 2.0 GHz —
Cache (L1 Instruction per core) 32 KB —
Cache (L1 Data per core) 32 KB —
Cache (L2 shared frontside) 1 MB —
Memory Controller DDR3 with ECC support —
PCIe PCI Express Gen 2 controllers integrated —
Ethernet Dual Gigabit Ethernet —
High-Speed Interconnect Serial RapidIO (SRIO) —
Hardware Acceleration DPAA (Data Path Acceleration Architecture) engine —
Security Engine SEC crypto engine integrated —
Gehäuse 1295-FCBGA (37.5 x 37.5 mm) —
Betriebstemperatur 0C to +105C -40 °C to +105 °C (industrial/extended, per datasheet) [DATA_NEEDED: confirmed Tj range]
Encryption Hardware-accelerated —
Manufacturer — NXP Semiconductors (Freescale legacy)
Series — QorIQ P5
Core Architecture — PowerPC e5500
Number of Cores — 1
Datenbusbreite — 64 bit
Maximale Taktfrequenz — 2.0 GHz
Package Type — 1295-FCPBGA (Flip-Chip Plastic BGA)
Package Size — 37.5 mm × 37.5 mm
Montageart — Surface Mount
Core Voltage Min — 0.95 V
Process Technology — [DATA_NEEDED: process node]
L1 Instruction Cache — [DATA_NEEDED: per core]
L1 Data Cache — [DATA_NEEDED: per core]
L2 Cache — [DATA_NEEDED: per core / shared]
RoHS-Status — Compliant
Part Status — Active (per distributor listing, as of 2026-10-17)

Datenblätter & Ressourcen

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