RTAX250S-1CG624E vs RTAX250S-CG624E Vergleich

Detaillierter Direktvergleich von RTAX250S-1CG624E von Microchip Technology und RTAX250S-CG624E von Microchip Technology. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Microchip Technology
RTAX250S-1CG624E RTAX250S-1CG624E - 250K-Gate Rad-Tolerant FPGA 624-CCGA | Microchip

RTAX250S-1CG624E - 250K-Gate Rad-Tolerant FPGA 624-CCGA | Microchip

RTAX250S-1CG624E ✓ Aktiv
Microchip Technology
RTAX250S-CG624E RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250S-CG624E ✓ Aktiv

Spezifikationsvergleich

Parameter RTAX250S-1CG624E RTAX250S-CG624E
Marke Microchip Technology Microchip Technology
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $960,00 $0,00
Family RTAX-S Radiation-Tolerant FPGA RTAX-S radiation-tolerant FPGA
Equivalent System Gates 250,000 —
Logic Cells 2816 —
Maximum Toggle Frequency 649 MHz 649 MHz
CLB Combinatorial Delay (Max) 0.930 ns —
Core Supply Voltage 1.5 V 1.5 V
Process Technology 0.15 um CMOS antifuse 0.15 um CMOS
Speed Grade -1 (approximately 15% faster than standard) —
Gehäuse 624-pin Ceramic Column Grid Array (CCGA) —
Betriebstemperatur -55C to +125C -55C to +125C
Configuration Type One-time programmable antifuse, live at power-up —
Logic Family CMOS CMOS
SEU Hardening SEU-hardened registers, immune to single-event upsets SEU-hardened registers, no external TMR required
Embedded Memory Embedded SRAM with built-in FIFO control —
Montageart Surface Mount Surface Mount
Application Domain Space flight / satellite systems —
System Gates — 250000 gates
Logic Cells (CLBs) — 2816
CLB Combinatorial Delay (max) — 0.930 ns
Package Type — CCGA-624 (ceramic column grid array, 624 pins)
Programming Technology — Antifuse (one-time programmable)
SEU Immunity — Immune to single-event upsets to specified LET threshold; SEU rate < 10-10 errors/bit-day
Power-Up Behavior — Live at power-up (true single-chip)
Target Application — Space-flight systems

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