SI53102-A3-GMR vs SI53112-A00AGM Vergleich
Detaillierter Direktvergleich von SI53102-A3-GMR von Skyworks Solutions und SI53112-A00AGM von Skyworks Solutions. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Skyworks Solutions
SI53102-A3-GMR - 1:2 PCIe Gen4 Clock Buffer, 8-TDFN | Skyworks
SI53102-A3-GMR NrndSkyworks Solutions
SI53112-A00AGM - 12-Output PCIe Gen 3 ZDB Buffer | Skyworks
SI53112-A00AGM ✓ AktivSpezifikationsvergleich
| Parameter | SI53102-A3-GMR | SI53112-A00AGM |
|---|---|---|
| Marke | Skyworks Solutions | Skyworks Solutions |
| Kategorie | Clock & Timing | Clock & Timing |
| Lebenszyklusstatus | NRND | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1,78 | $3,76 |
| Funktion | 1:2 PCIe Gen 1/2/3/4 fan-out clock buffer | — |
| Anzahl der Ausgänge | 2 differential | 12 differential pairs (24 outputs) |
| Number of Inputs | 1 differential reference | — |
| Output Frequency | 100 MHz (HCSL) | — |
| PCIe Compliance | Gen 1, Gen 2, Gen 3, Gen 4 common clock | — |
| SATA Support | Yes, 100 MHz | — |
| Versorgungsspannung | 2.5 V or 3.3 V | — |
| Ausgangstyp | Differential HCSL (current-mode logic) | HCSL (current-mode differential) |
| Additive Jitter | Low PCIe Gen 4 jitter (per Skyworks datasheet) | — |
| Spread-Spectrum Clocking | SSC-tolerant input pass-through | — |
| External Termination | None required (integrated source termination) | — |
| Gehäuse | 8-pin TDFN-EP (1.4 mm x 1.6 mm) | 64-pin QFN (9x9 mm) with exposed pad |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | -40C to +85C (industrial, per Skyworks datasheet family) | -40C to +85C (industrial) |
| RoHS-Status | Compliant | Compliant |
| Product Type | — | 1:12 Zero-Delay Buffer (ZDB) |
| Compliance Specification | — | Intel DB1200ZL |
| Input Frequency Range | — | 25 MHz to 200 MHz |
| Output Frequency Range | — | 100 MHz / 133.33 MHz (hardware pin selectable) |
| Additive Phase Jitter | — | < 0.5 ps RMS (12 kHz to 20 MHz) |
| Input-to-Output Delay | — | < 50 ps (ZDB PLL alignment) |
| Core Supply Voltage | — | 3.3 V |
| MSL-Level | — | 3 (168 hours) |
| Supported Protocols | — | PCIe Gen 1/2/3/4, Intel QPI, SAS, SATA, SMI |