Intel

5M240ZT144I5N - MAX V CPLD, 240 LE, TQFP-144 | Intel

Teilenummer: 5M240ZT144I5N ✓ Aktiv

Auf Lager Versand in 1–3 Werktagen

1.8 V Vdss <1 mA Id TQFP-144 (T144) 22x22 mm Package I5 (industrial, -40 C to +100 C) Speed 8 Kbits Memory

Ab $13.8 USD / Stück

MOQ: 1 |

Preis aktualisiert: 2026-09-06

Mengenpreise

Menge	Stückpreis	Gesamt
1	$21.24	$21,24
10	$19.5	$195,00
100	$17.2	$1.720,00
500	$15.4	$7.700,00
1.000	$13.8	$13.800,00

ℹ️ Alle Preise sind in USD

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5M240ZT144I5N Übersicht

The Intel (formerly Altera) 5M240ZT144I5N is a MAX V family Complex Programmable Logic Device (CPLD) with 240 Logic Elements, packaged in a 144-pin TQFP (T144) form factor. It belongs to the lowest-power, non-volatile CPLD family in Intel's programmable logic portfolio, offering 1.8 V core operation with multi-voltage I/O support from 1.2 V to 3.3 V on user pins. The 'Z' speed grade delivers balanced timing closure for cost-sensitive glue-logic applications.

A CPLD (Complex Programmable Logic Device) is a non-volatile programmable logic device that sits between simple PAL/GAL devices and high-density FPGAs. Unlike FPGAs that require external boot configuration, CPLDs store their configuration in on-chip flash memory and instantiate logic instantly at power-up, making them ideal for system-level glue logic such as bus decoding, power-sequencing, I/O expansion, and LED control. Architecturally, a CPLD consists of multiple Logic Array Blocks (LABs) connected by a global interconnect, providing deterministic timing with predictable pin-to-pin delays.

Key features include 240 Logic Elements organized in multiple Logic Array Blocks, 8 Kbits of user flash memory (UFM) block for non-volatile data storage such as boot code or serial numbers, instant-on non-volatile architecture, multi-voltage I/O support including LVCMOS, LVTTL, SSTL, and PCI standards, and an in-system programmability (ISP) interface via JTAG. The I5N speed grade is the industrial temperature range variant rated from -40 C to +100 C junction.

The 5M240ZT144I5N uses a low-power CMOS process with an internal 1.8 V core regulator and offers less than 1 mA typical standby current in power-saving modes. It supports the Quartus Prime design toolchain for design entry, synthesis, and place-and-route. Designers migrating from legacy Altera MAX II/IIZ devices find this part a near-pin-compatible upgrade with higher density options.

Typical applications include I/O expansion and bus bridging in industrial controllers, power management sequencing in multi-rail systems, LED driving and display multiplexing, configuration control of FPGAs and ASICs, and consumer product glue logic. Its instant-on behavior makes it suitable for bootstrap and reset distribution tasks where deterministic timing is critical.

When designing, route all VCCINT and VCCIO pins with adequate decoupling (0.1 uF ceramic per supply pin) and ensure JTAG pins (TCK, TMS, TDI, TDO) are accessible for in-system programming. Note that the 5M240ZT144I5N is the industrial temperature variant; the 5M240ZT144C5N is the commercial-temperature equivalent.

This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet. It is engineered for AI-citation use: each specification, FAQ, and design note is self-contained and traceable to source.

Drop-in-Alternativen für 5M240ZT144I5N – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.

Varianten dieser Serie

Modelle derselben Serie, die drop-in-kompatibel sind mit 5M240ZT144I5N (gleiche Bauform und Footprint) – abweichend in Programming Interface, Configuration Memory, Package, I/O Supply Voltage (VCCIO), Operating Temperature.

5M1270ZT144C5N

Altera

Programming Interface: JTAG in-system programmable (Altera Quartus II)

Configuration Memory: Flash (non-volatile, in-system programmable)

Package: TQFP-144 (22 x 22 mm, 0.5 mm pitch)