ADS8372IBRHPRG4 - 16-Bit 600kHz Pseudo-Bipolar SAR ADC | Texas Instruments
Teilenummer: ADS8372IBRHPRG4 ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $18.5 | $18,50 |
| 10 | $17.1 | $171,00 |
| 100 | $14.95 | $1.495,00 |
| 500 | $13.4 | $6.700,00 |
| 1.000 | $11.85 | $11.850,00 |
ADS8372IBRHPRG4 Übersicht
An SAR ADC is a successive-approximation analog-to-digital converter that uses a binary-search algorithm against an internal capacitive DAC to resolve each sample. Compared with delta-sigma (sigma-delta) ADCs, SAR architectures deliver deterministic latency, single-cycle conversion, and excellent behavior on multiplexed or multi-channel inputs. The ADS8372 family sits in the high-speed, low-power node of the SAR tier: it resolves 16 bits at 600 kSPS with no pipeline delay, making it a workhorse for industrial control loops where latency determinism matters as much as raw sample rate.
Key features of the ADS8372IBRHPRG4 include 600 kSPS maximum throughput, 16-bit no-missing-codes resolution, fully differential pseudo-bipolar input with wide common-mode range, low power dissipation suitable for portable industrial instrumentation, an internal 2.5V reference option with external override, and a high-speed 40 MHz serial CMOS output interface compatible with DSPs, FPGAs, and modern microcontrollers. The 28-pin QFN-6x6 PowerPAD package provides a low thermal-resistance path to PCB copper for reliable operation across the industrial temperature range.
The ADS8372 is implemented in a low-power CMOS process with on-chip input sampling switches and a precision charge-redistribution DAC. Pseudo-bipolar input support is achieved through input common-mode translation rather than a negative supply, simplifying board design in single-supply industrial systems. The serial interface is SPI-/QSPI-/MICROWIRE-compatible, allowing direct connection to most digital host controllers without glue logic.
Typical applications include industrial multi-channel data acquisition systems, motor control current and position sensing, optical encoder readout, medical instrumentation signal chains, vibration and acoustic analysis front ends, and high-precision weigh scales. The combination of 16-bit resolution and 600 kSPS throughput is well matched to multiplexed input modules and synchronous-sampling DSP front ends.
Designers should place input RC anti-alias components close to the analog inputs and route the serial interface lines with controlled impedance to preserve 16-bit dynamic performance. The exposed thermal pad must be soldered to a top-layer copper pour of at least 1 square inch to keep junction temperature within the datasheet ratings under sustained sampling at 600 kSPS. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in-Alternativen für ADS8372IBRHPRG4 – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit ADS8372IBRHPRG4 (gleiche Bauform und Footprint) – abweichend in Digital Interface, Mounting Type, Number of Input Channels, Operating Temperature Range, Package.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
ADS8372IBRHPR
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
ADS8372IBRHPT
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
ADS8372IBRHPRG4 Grenzwerte & elektrische Eigenschaften
| Auflösung | 16 bits |
| Architecture | SAR (Successive Approximation Register) |
| Number of Input Channels | 1 (single pseudo-bipolar differential) |
| Sample Rate (Throughput) | 600 kSPS |
| Input Configuration | Fully differential, pseudo-bipolar |
| Digital Interface | Serial CMOS, up to 40 MHz SCLK |
| Reference | Internal 2.5V or external override (per datasheet) |
| Gehäuse | 28-pin QFN (RHP) 6x6 mm with thermal pad |
| Betriebstemperaturbereich | -40C to +85C (industrial) |
| Quiescent Power Consumption | Micropower (per datasheet) |
| Montageart | Surface Mount (QFN with PowerPAD) |
| RoHS-Status | Compliant (per distributor listings) |
ADS8372IBRHPRG4 Pin-Konfiguration
| Pin 1 | AGND — Analog ground |
| Pin 2 | AVDD — Analog +5V supply |
| Pin 3 | AVDD — Analog +5V supply |
| Pin 4 | REF — External reference input / internal reference bypass |
| Pin 5 | REFGND — Reference ground |
| Pin 6 | CAP — Reference bypass capacitor |
| Pin 7 | AVDD — Analog +5V supply |
| Pin 8 | AGND — Analog ground |
| Pin 9 | IN+ — Pseudo-bipolar differential positive input |
| Pin 10 | IN- — Pseudo-bipolar differential negative input |
| Pin 11 | AGND — Analog ground |
| Pin 12 | AGND — Analog ground |
| Pin 13 | DGND — Digital ground |
| Pin 14 | DVDD — Digital supply |
| Pin 15 | CS — Chip select, active low |
| Pin 16 | SDI — Serial data input |
| Pin 17 | SCLK — Serial clock input, up to 40 MHz |
| Pin 18 | SDO — Serial data output |
| Pin 19 | TAG — Tag input for channel identification |
| Pin 20 | BUSY — Conversion busy output, active high |
| Pin 21 | RESET — Reset input, active low |
| Pin 22 | CONVST — Conversion start input |
| Pin 23 | FS — Full-scale input (per datasheet) |
| Pin 24 | DGND — Digital ground |
| Pin 25 | DVDD — Digital supply |
| Pin 26 | AGND — Analog ground |
| Pin 27 | AVDD — Analog +5V supply |
| Pin 28 | AVDD — Analog +5V supply |
Typische Anwendungen
ADS8372IBRHPRG4 ist geeignet für 7 Anwendungs: Industrial Multi-Channel Data Acquisition, Motor Control Position and Current Sensing, Precision Weigh-Scale and Strain-Gage Front End, Optical Encoder and Position Sensing, Vibration and Acoustic Analysis, Medical Instrumentation Signal Chain, DSP and FPGA Front-End Data Converters.
Industrial Multi-Channel Data Acquisition
The ADS8372IBRHPRG4's 600 kSPS throughput, 16-bit no-missing-codes resolution, and serial interface up to 40 MHz make it a strong fit for multi-channel industrial data-acquisition modules where several sensors are multiplexed into a single ADC front end. Designers typically place a low-leakage analog mux ahead of the pseudo-bipolar differential inputs and run the SAR clock between 10 and 40 MHz to match downstream DSP firmware. Compared with sigma-delta ADCs, the SAR architecture delivers a single-cycle deterministic latency that simplifies real-time control loops, and the micropower consumption suits PLC-style remote I/O modules. Reference decoupling at the AVDD_REF and REF pins is critical for realizing the datasheet SNR across the industrial -40C to +85C range.
Empfohlen
Motor Control Position and Current Sensing
The ADS8372IBRHPRG4 suits servo and stepper motor control feedback loops where the rotor position or current sense signal must be sampled synchronously with PWM events. Pseudo-bipolar differential inputs accommodate current-sense amplifier outputs that swing around a non-zero common-mode voltage, eliminating the need for level shifting. At 600 kSPS the device oversamples PWM-driven current ripple, allowing field-oriented control algorithms to extract fundamental and harmonic components in DSP firmware. The 28-pin QFN (RHP) 6x6 mm PowerPAD footprint survives the 85C ambient temperatures typical of motor drive enclosures, and the SAR latency of one conversion cycle aligns naturally with the control loop period.
Empfohlen
Precision Weigh-Scale and Strain-Gage Front End
The 16-bit resolution and micropower dissipation of the ADS8372IBRHPRG4 are a good match for battery-powered precision weigh scales and strain-gage transducer front ends. The pseudo-bipolar differential input accepts the small differential signals produced by a Wheatstone bridge after an instrumentation amplifier, and the 600 kSPS throughput allows averaging of multiple samples per weight reading to suppress 50/60 Hz mains interference. The internal 2.5V reference option simplifies ratiometric measurements with bridge excitation regulated from the same analog rail, and the 28-pin QFN (RHP) PowerPAD package dissipates SAR switching transients through the top copper pour for clean 16-bit conversion.
Empfohlen
Optical Encoder and Position Sensing
Optical encoders and linear position sensors often output analog quadrature or amplitude-modulated signals that must be digitized before interpolation in firmware. The ADS8372IBRHPRG4's pseudo-bipolar differential input stage handles the small AC bipolar signals from an optical detector pair without negative supply rails, while its 600 kSPS sample rate supports encoders with base frequencies up to several hundred kilohertz. A SAR ADC's no-latency conversion means the host processor receives each sample immediately and can compute line-count and direction estimates in real time, replacing discrete interpolator ICs.
Empfohlen
Vibration and Acoustic Analysis
Condition-monitoring modules for rotating machinery and acoustic analyzers demand 16-bit resolution and at least hundreds of kSPS to capture vibration harmonics up to the audio band. The ADS8372IBRHPRG4 delivers 600 kSPS with deterministic single-cycle conversion latency, ideal for synchronous sampling driven by a high-resolution timer. Designers typically anti-alias filter the input with a 100 to 200 kHz LPF ahead of the SAR input capacitance to satisfy Nyquist and to avoid high-frequency alias content. The serial data output streams directly into a DSP or FPGA FFT engine without glue logic.
Empfohlen
Medical Instrumentation Signal Chain
Medical instrumentation front ends such as ECG front ends, blood-pressure modules, and clinical-grade patient monitors digitize low-frequency biomedical signals that benefit from a 16-bit SAR ADC's lack of pipeline delay. The pseudo-bipolar input of the ADS8372IBRHPRG4 accepts the differential output of an instrumentation amplifier chain, and its micropower consumption suits battery-powered portable monitors. Industrial -40C to +85C grading supports the full environment of hospital and home-care electronics. Use a low-leakage input RC network to avoid degrading the 16-bit code width at low sampling rates.
Empfohlen
DSP and FPGA Front-End Data Converters
The ADS8372IBRHPRG4 is a natural front-end to TI C6000 DSPs, modern microcontroller SERCOM modules, and mid-range FPGAs. Its 40 MHz CMOS serial interface signals are protocol-compatible with SPI, QSPI, and MICROWIRE buses, allowing the host DMA engine to offload conversion streams with minimal CPU overhead. Latency from CONVST to BUSY falling is one conversion cycle, which simplifies the glue between ADC and DSP interrupt routines. At 600 kSPS a single device saturates a slow SPI link but is comfortably served by most modern MCUs at SCLK = 30 MHz or higher.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für ADS8372IBRHPRG4 – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | ADS8372IBRHPR | ADS8372IBRHPT | ADS8482IBRGZR | ADS8410IBPFBR | ADS7863IDBQR | ADS6424IRGC25 |
|---|---|---|---|---|---|---|---|
| Package | 28-QFN (RHP) 6x6 mm | 28-QFN (RHP) 6x6 mm - same | 28-QFN (RHP) 6x6 mm - same | 48-QFN (RGZ) | 48-TQFP (PFB) | 28-SSOP (DBQ) | 48-QFN (RGC) |
| Brand | Texas Instruments | Texas Instruments - same | Texas Instruments - same | Texas Instruments - same | Texas Instruments - same | Texas Instruments - same | Texas Instruments - same |
| Resolution | 16 bits | 16 bits | 16 bits | 18 bits | 16 bits | 12 bits | 14 bits |
| Sample Rate | 600 kSPS | 600 kSPS | 600 kSPS | 1 MSPS | 2 MSPS | 200 kSPS | 105 MSPS |
| Architecture | SAR (single channel) | SAR (single channel) | SAR (single channel) | SAR (single channel) | SAR (single channel) | SAR (dual channel) | Pipelined |
| Input Type | Pseudo-bipolar differential | Pseudo-bipolar differential | Pseudo-bipolar differential | True bipolar differential | Differential or single-ended | Differential/single-ended | Differential LVDS-style |
| Interface | Serial CMOS, 40 MHz | Serial CMOS, 40 MHz | Serial CMOS, 40 MHz | Serial/parallel LVDS | Parallel CMOS | Serial CMOS | Parallel LVDS |
| Temperature Grade | -40C to +85C industrial | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
| Suitable Drop-In Footprint | Yes | Yes - exact same 28-QFN | Yes - exact same 28-QFN | No - 48-pin package | No - 48-pin TQFP | No - 28-pin SSOP | No - 48-pin QFN |
Wichtigste Unterscheidungsmerkmale
- Micropower 16-bit / 600 kSPS combination in compact 28-QFN (vs. ADS8482IBRGZR)
- Single-channel pseudo-bipolar differential input (vs. ADS7863IDBQR)
- True single-supply bipolar digitization (vs. ADS8410IBPFBR)
Designhinweise
The 28-pin QFN (RHP) 6x6 mm package has an exposed thermal pad that MUST be soldered to a top-layer copper pour for reliable operation. Estimated: a top-pour of at least 1 square inch connected to AGND keeps junction temperature rise under 30C at typical micropower dissipation; smaller pours proportionally degrade thermal performance and may shift the ADC's offset over the industrial temperature range.
Decouple AVDD pins with a 10 uF X7R ceramic plus a 100 nF X7R placed within 1 mm of each AVDD pad; place a 1 uF to 10 uF ESR-stable capacitor on the REF pin to keep the on-chip reference below the datasheet's 5 uV p-p line-density noise floor. Star-route AGND and DGND back at the regulator sense point rather than daisy-chaining, to avoid SAR switching currents corrupting the analog ground return.
Do not skip the input RC anti-alias network on IN+ and IN-. The internal switch-cap front end exhibits kick-back at the sample moment; an external 10 to 100 ohm + 10 to 100 pF RC filter isolates the source from this kick-back. Estimated: a 33R + 47 pF filter yields about 100 ns settling before the SAR decision phase, adequate for the 600 kSPS sample rate. Larger R or C values unnecessarily narrow input bandwidth and add distortion.
Route the serial CMOS lines (CS, SCLK, SDO, SDI) as tightly-coupled matched-length traces to avoid inter-signal skew at the 40 MHz SCLK limit. Keep the SDO trace off any noisy clock or PWM lines, and place series damping resistors within 25 mm of the driver to tame transmission-line effects. The 28-QFN's staggered pin pitch requires careful escape routing - fan out with via-in-pad to inner AGND/DGND split planes.
Pseudo-bipolar differential inputs require good common-mode rejection at the source. Place the ADS8372IBRHPRG4 immediately after the input instrumentation amplifier without additional series impedance so the PCB trace capacitance does not unbalance the two legs. Estimated: a 5 mm matched-length differential pair sees ~1 pF of trace capacitance, holding CMRR above 70 dB at low frequency; long unmatched traces can degrade CMRR by 10 to 20 dB.
Compliance-Informationen
G4 suffix in TI part number denotes Pb-free green packaging per industry convention. ROHS and REACH compliance per DigiKey product listing. Halogen-free status and PPAP documentation were not explicitly listed in the verified web data and are marked unknown for accuracy.
