AT25640B-SSHL-T - 64Kb SPI EEPROM, 8-SOIC, 20 MHz | Microchip
Teilenummer: AT25640B-SSHL-T ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $0.58 | $0,58 |
| 10 | $0.52 | $5,20 |
| 100 | $0.44 | $44,00 |
| 500 | $0.39 | $195,00 |
| 1.000 | $0.35 | $350,00 |
| 3.000 | $0.3 | $900,00 |
AT25640B-SSHL-T Übersicht
A Serial EEPROM is a non-volatile memory that retains data without power, accessed serially through a small pin count. It belongs to the broader hierarchy: EEPROM -> non-volatile memory (NVM) -> memory IC -> semiconductor. Compared with Flash memory, EEPROM offers byte-level erase/write granularity and superior write endurance for parameter storage, while compared with parallel EEPROMs it reduces pin count dramatically. SPI EEPROMs in particular are favored for their low pin count, ease of microcontroller integration, and high clock rates that shorten page-program times.
Key features of the AT25640B-SSHL-T include 32-byte page-write mode, hardware and software write-protect options, SPI Modes 0 and 3 support, low standby current of typically 5 µA at 5V, and over 1 million erase/write cycles per page with 100 years of data retention. The device uses a self-timed internal write cycle and provides a WP pin for block-level protection plus a HOLD pin for suspending serial communication without deselecting the chip.
Internally the AT25640B uses Microchip's proprietary CMOS floating-gate process technology that combines high-density storage cells with on-chip charge pumps, eliminating the need for an external high-voltage VPP supply. The Schmitt-trigger inputs and CMOS outputs make the part tolerant of slow or noisy SPI edges, and the wide 1.8V-5.5V supply range lets the same chip serve 1.8V MCU rails and legacy 5V industrial buses without level shifters.
Typical applications include automotive infotainment and body-electronics parameter storage, industrial sensor calibration data, consumer appliance user settings, smart-meter measurement logs, and IoT device configuration storage. The AEC-Q100 qualification of the broader AT25640B family makes it suitable for under-hood and dashboard automotive designs.
When designing with this part, place a 100 nF decoupling capacitor within 5 mm of the VCC pin and route the SCK trace as a short, impedance-controlled line to avoid ringing above VCC or below ground. Because the SOIC-8 package dissipates very little power, no heatsink or thermal copper pour is required - it can be placed near other ICs without thermal concerns.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in-Alternativen für AT25640B-SSHL-T – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit AT25640B-SSHL-T (gleiche Bauform und Footprint) – abweichend in Data Retention, Package, MSL Level, Write Protection, Endurance.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
AT25640B-MAHL-T
✅ Drop-In✓ Auf Lager
$0.36 / Stück
Datenblatt ansehen →AT25320B-SSHL-T
✅ Drop-In✓ Auf Lager
$0.23 / Stück
Datenblatt ansehen →AT24C64CN-SH-B
✅ Drop-In✓ Auf Lager
$0.27 / Stück
Datenblatt ansehen →25LC512-E/SN
✅ Drop-In✓ Auf Lager
$0.86 / Stück
Datenblatt ansehen →25LC256-E/SN
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
M95640-WMN6TP
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
AT25640B-SSHL-T Grenzwerte & elektrische Eigenschaften
| Speichertyp | Non-volatile EEPROM (Serial) |
| Memory Density | 64 Kbit |
| Memory Organization | 8192 x 8 (8 KB) |
| Schnittstelle | SPI (Serial Peripheral Interface) |
| Maximale Taktfrequenz | 20 MHz |
| Supply Voltage (VCC) | 1.8 V to 5.5 V |
| Page Size | 32 bytes |
| Endurance | 1,000,000 erase/write cycles per page (typical) |
| Data Retention | 100 years (typical) |
| Standby Current | 5 µA typical at 5 V |
| Write Cycle Time | 5 ms typical (page write) |
| SPI Modes | Mode 0 (0,0) and Mode 3 (1,1) |
| Write Protection | Hardware (WP pin) and software (status register) |
| Betriebstemperatur | -40 °C to +85 °C (industrial) |
| Gehäuse | 8-pin SOIC (SOIC-8, narrow body, 0.150") |
| Montageart | Surface Mount |
| AEC-Q100 | Qualified (AT25640B family) |
| RoHS-Status | Compliant |
| Lead-Free / Halogen-Free | Yes |
| MSL-Level | 1 (unlimited floor life) |
AT25640B-SSHL-T Pin-Konfiguration
| Pin 1 | CS — Chip Select (active low). Pulled high to deselect the device and tri-state SO. |
| Pin 2 | SO — Serial Output (MISO). Tri-state data output shifted on the falling edge of SCK. |
| Pin 3 | WP — Write Protect (active low). When low, blocks writes to the upper half of the array when the WPEN bit is set. |
| Pin 4 | GND — Ground reference for both analog and digital sections. |
| Pin 5 | SI — Serial Input (MOSI). Opcode, address and data are clocked in on the rising edge of SCK. |
| Pin 6 | SCK — Serial Clock. Up to 20 MHz at 5 V VCC; supports SPI Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1). |
| Pin 7 | HOLD — Hold (active low). Suspends serial communication without deselecting the chip; useful for sharing the SPI bus with another device. |
| Pin 8 | VCC — Power supply input, 1.8 V to 5.5 V. Decouple with 100 nF placed within 5 mm of the pin. |
Typische Anwendungen
AT25640B-SSHL-T ist geeignet für 6 Anwendungs: Automotive Infotainment Parameter Storage, Industrial Sensor Calibration Data, Smart Meter Measurement Logs, Consumer Appliance User Settings, IoT Device Configuration Storage, Medical Device Parameter Storage.
Automotive Infotainment Parameter Storage
The AT25640B-SSHL-T is well-suited to automotive infotainment parameter storage because it combines AEC-Q100 qualification with 64 Kbit (8 KB) of byte-addressable EEPROM and a 20 MHz SPI interface. Its 32-byte page-write mode allows bulk updates of audio EQ tables, radio presets, and last-mode user settings in 5 ms per page, while its 1.8-5.5 V supply range lets it share the same 3.3 V rail as the head-unit MCU. Hardware WP plus software status-register protection prevents accidental corruption during brown-out events typical of cranking transients.
Empfohlen
Industrial Sensor Calibration Data
For industrial sensors and transmitters, the AT25640B-SSHL-T stores factory calibration coefficients, linearity tables, and sensor identity strings in 8 KB of byte-addressable EEPROM. The 20 MHz SPI clock lets a microcontroller read the entire calibration block in under 5 ms, and the 1.8-5.5 V VCC range means the chip can ride the same 3.3 V LDO that powers the sensor ADC. The 1,000,000-cycle endurance per page supports periodic field re-calibration without wear-out concern, while the 100-year data retention guarantees traceable identity over the equipment's full service life.
Empfohlen
Smart Meter Measurement Logs
In single-phase and polyphase smart meters, the AT25640B-SSHL-T retains tamper-event logs, billing snapshots, and configuration between power outages. The 64 Kbit (8 KB) capacity holds roughly 250 timestamped 32-byte event records - enough for a full month's worth of anomaly capture at one event per hour. SPI Mode 0/3 compatibility and 20 MHz throughput let the metering MCU flush logs quickly during the narrow post-outage window, while the -40 to +85 °C industrial operating range covers outdoor enclosures. Wide 1.8-5.5 V support also tolerates the meter running off a partially discharged supercap during blackout events.
Empfohlen
Consumer Appliance User Settings
White-goods and small kitchen appliances use the AT25640B-SSHL-T to remember user-selected programs, cycle counters, and language preferences across power cycles. The SOIC-8 narrow-body footprint fits easily inside compact user-interface boards, and the 32-byte page write supports fast bulk saves when a custom program is stored. The 1.8-5.5 V range lets the chip operate directly off the appliance's 3.3 V standby rail without a separate regulator, and the wide -40 to +85 °C range covers refrigerator and oven-ambient environments.
Empfohlen
IoT Device Configuration Storage
For Wi-Fi and BLE IoT endpoints, the AT25640B-SSHL-T stores Wi-Fi credentials, provisioning tokens, device certificates, and last-known-state bytes that must survive firmware reflash. Because it is a true EEPROM rather than Flash, individual bytes can be rewritten 1 million times without sector wear - critical for counters, retry counters, and OTA bookkeeping. The 20 MHz SPI clock lets an ESP32 or similar host read the entire 8 KB config block in under 4 ms at boot, and the 1.8 V minimum keeps the part compatible with coin-cell-driven sensor nodes that throttle the rail to save energy.
Empfohlen
Medical Device Parameter Storage
In non-implantable medical electronics such as blood-pressure monitors, infusion pumps, and point-of-care analyzers, the AT25640B-SSHL-T retains calibration constants and audit-trail data in 8 KB of byte-addressable EEPROM. The 100-year data retention ensures long-term traceability of patient measurements, while the 1 million erase/write cycles support daily recalibration over the equipment's expected 10+ year service life. The 1.8-5.5 V range integrates with both 3.3 V ARM Cortex-M hosts and legacy 5 V microcontrollers, and the -40 to +85 °C industrial range covers clinical and ambulatory environments.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für AT25640B-SSHL-T – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | AT25640B-MAHL-T | AT25320B-SSHL-T | AT24C64CN-SH-B | 25LC512-E/SN | 25LC256-E/SN | M95640-WMN6TP |
|---|---|---|---|---|---|---|---|
| Package | SOIC-8 (narrow body) | SOIC-8 (narrow body) - same | SOIC-8 (narrow body) - same | SOIC-8 (narrow body) - same | SOIC-8 (narrow body) - same | SOIC-8 (narrow body) - same | SOIC-8 (narrow body) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | STMicroelectronics |
| Memory Density | 64 Kbit (8192 x 8) | 64 Kbit (8192 x 8) | 32 Kbit (4096 x 8) | 64 Kbit (8192 x 8) | 64 Kbit (8192 x 8) | 32 Kbit (4096 x 8) | 64 Kbit (8192 x 8) |
| Interface | SPI | SPI | SPI | I2C (2-wire) | SPI | SPI | SPI |
| Maximum Clock | 20 MHz | 20 MHz | 20 MHz | 1 MHz (I2C Standard/Fast) | 20 MHz | 20 MHz | 10 MHz |
| Supply Voltage | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 2.5 V to 5.5 V |
| AEC-Q100 | Qualified (family) | Qualified (family) | Qualified (family) | Not qualified | Not qualified | Not qualified | Not qualified |
| Operating Temperature | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +85 °C |
| Approx Unit Price (qty-1) | $0.58 | $0.55-$0.60 | $0.45-$0.50 | $0.30-$0.35 | $0.85-$0.95 | $0.65-$0.75 | $0.40-$0.50 |
Wichtigste Unterscheidungsmerkmale
- AEC-Q100 qualified within the AT25640B family for automotive designs (vs. M95640-WMN6TP)
- Highest SPI clock (20 MHz) at 5 V in the AT25xxx family (vs. M95640-WMN6TP)
- True SPI (4-wire with separate WP and HOLD) versus I2C 2-wire sharing (vs. AT24C64CN-SH-B)
Designhinweise
Decouple VCC with a 100 nF X7R ceramic capacitor placed within 5 mm of pin 8, with a short, wide trace to pin 4 (GND). The AT25640B-SSHL-T draws approximately 5 µA in standby and a few mA active, so a single 100 nF cap is sufficient; avoid sharing the decoupling node with high-current loads such as LEDs or relays that could inject switching noise into the EEPROM rail.
Route SCK, SI, SO, CS as short parallel traces (length match within 5 mm) and avoid running them next to noisy signals like motor phase traces. Add a 10-33 ohm series resistor on SCK at the MCU end if the trace exceeds 50 mm or the SPI bus exceeds 10 MHz. The CS pin must transition high between transactions so that the internal state machine resets; if CS is left low, the part will interpret the next SCK edges as a new opcode.
Do not issue a write command without first polling the WIP (write-in-progress) bit in the status register or waiting 5 ms; if you write while a previous write is still in progress, the operation will be ignored and the data may be corrupted. Also, the WP pin must be high (or the WPEN bit cleared) for writes to succeed - a common issue when boards are tested with WP tied to GND via a test-point clip.
SMT-pad design must follow the SOIC-8 narrow-body land pattern (IPC-7351 SOIC127P600X175-8M). Use soldermask-defined or non-soldermask-defined pads as your PCB house prefers, but keep the pad width at least 0.5 mm to ensure good wetting. If the EEPROM shares a board with a wireless module, keep at least 10 mm of clearance between the antenna and the EEPROM to avoid coupling noise into the SPI lines during writes.
Compliance-Informationen
RoHS and REACH compliant per Microchip product page. The AT25640B family is AEC-Q100 qualified for automotive applications. Lead-free and halogen-free finish. Conflict-minerals declaration available from Microchip.
