AT25640B-MAHL-T - 64Kb SPI EEPROM, 20MHz, 8-UDFN | Microchip
MPN: AT25640B-MAHL-T ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0.85 | $0.85 |
| 10 | $0.76 | $7.60 |
| 100 | $0.62 | $62.00 |
| 500 | $0.51 | $255.00 |
| 1,000 | $0.44 | $440.00 |
| 5,000 | $0.36 | $1,800.00 |
AT25640B-MAHL-T Overview
A serial EEPROM (Electrically Erasable Programmable Read-Only Memory) is a type of non-volatile memory that retains data when power is removed and supports bit-level or byte-level electrical rewrites. In the system hierarchy, it sits under non-volatile memory -> memory IC -> integrated circuit -> semiconductor. SPI EEPROMs like the AT25640B-MAHL-T are preferred over parallel EEPROMs and I2C EEPROMs when designers need higher throughput (up to 20 MHz vs 1 MHz I2C), simpler firmware (no address-byte muxing), and lower pin count than parallel NV memory.
Key differentiating features include a 64 Kbit density in a small 8-UDFN footprint, low standby current of 1 µA typical (2 µA maximum at 5.5 V), fast page-write latency of ≤5 ms, and full SPI mode 0 (CPOL=0, CPHA=0) and mode 3 (CPOL=1, CPHA=1) compatibility. The -MAHL-T suffix denotes the UDFN (MA) package, tape-and-reel (T), with hardware write-protect (H) and 1.8 V minimum Vcc (L).
The AT25640B uses a split-gate cell design with on-chip high-voltage charge pumps and a self-timed write cycle, achieving reliable operation across industrial temperature ranges (-40 °C to +85 °C). Its 8-UDFN package with exposed pad provides a low thermal resistance path and excellent mechanical reliability for consumer, industrial, and automotive-aftermarket assemblies.
Typical applications include configuration parameter storage in industrial controllers, user-setting retention in white goods, calibration tables in medical and test instruments, and asset tracking/BOM storage in IoT nodes. The wide voltage range (1.8 V to 5.5 V) makes it ideal for battery-powered and energy-harvesting designs.
When designing with the AT25640B-MAHL-T, place a 0.1 µF decoupling capacitor as close as possible to VCC and tie CS high through a pull-up resistor when not in use to prevent spurious writes. For new layouts, prefer the UDFN package over the SOIC/TSSOP variants for the smallest PCB footprint.
This page synthesizes distributor pricing, same-package drop-in alternatives, and practical SPI EEPROM design notes that are not consolidated on the manufacturer datasheet, enabling faster component selection and PCB redesign.
Drop-in alternatives for AT25640B-MAHL-T — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with AT25640B-MAHL-T (same form factor and footprint) — differing in Data Retention, Endurance, Lead-Free / Halogen-Free, MSL Level, Maximum Clock Frequency.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
AT25640B-MAHL
✅ Drop-In📋 Reference alternative (not in catalog)
AT25320B-MAHL-T
✅ Drop-In📋 Reference alternative (not in catalog)
AT25640B-MAHL-T Maximum Ratings & Electrical Characteristics
| Memory Type | EEPROM (Serial, SPI) |
| Memory Density | 64 Kbit (8 KB) |
| Memory Organization | 8192 x 8 bit |
| Interface | SPI (Serial Peripheral Interface) |
| SPI Modes | Mode 0 (0,0) and Mode 3 (1,1) |
| Maximum Clock Frequency | 20 MHz @ 5 V |
| Supply Voltage (Vcc) | 1.8 V to 5.5 V |
| Operating Temperature Range | -40 °C to +85 °C (Industrial) |
| Page Write Buffer Size | 32 bytes |
| Write Cycle Time | ≤5 ms (byte/page) |
| Endurance | >1,000,000 erase/write cycles per page |
| Data Retention | 100 years |
| Standby Current | 1 µA typical, 2 µA max @ 5.5 V |
| Package | 8-UDFN (2 mm x 3 mm) with Exposed Pad |
| Mounting Type | Surface Mount |
| MSL Level | 1 (per JEDEC J-STD-020) |
| RoHS Status | Compliant |
| Write Protect | Hardware (WP pin) and Software block protection (upper 1/4 array) |
| Lead-Free / Halogen-Free | Yes / Yes |
AT25640B-MAHL-T Pin Configuration
| Pin 1 | CS — Chip Select, active low |
| Pin 2 | SO — Serial Data Output (MISO) |
| Pin 3 | WP — Write Protect, active low (hardware protects entire array when low) |
| Pin 4 | VSS — Ground |
| Pin 5 | SI — Serial Data Input (MOSI) |
| Pin 6 | SCK — Serial Clock Input |
| Pin 7 | HOLD — Hold, active low (pauses serial communication) |
| Pin 8 | VCC — Power supply, 1.8 V to 5.5 V |
Typical Applications
AT25640B-MAHL-T is suitable for 6 applications: Industrial PLC Configuration Storage, Medical Device Calibration Memory, Asset Tracking and IoT Node Identity, Consumer Appliance User-Setting Retention, Automotive Aftermarket Accessory Memory, Test and Measurement Instrument Calibration.
Industrial PLC Configuration Storage
The AT25640B-MAHL-T stores user-configurable setpoint and calibration data in industrial PLCs. Its 8 KB (8192-byte) array easily holds hundreds of parameter blocks, while the 20 MHz SPI bus keeps read latency low during scan cycles. The wide 1.8 V to 5.5 V Vcc range means the same part covers both 3.3 V MCU logic and 5 V backplane rails without level shifters. With 1 million write cycles per page and 100-year retention, the device outlasts the PLC's 15-20 year service life even with frequent operator re-tuning. Recommended placement: behind a 16 kV ESD-rated SPI isolator (e.g. ADuM141E) for IEC 61131-2 compliance.
Recommended
Medical Device Calibration Memory
Patient-monitoring and diagnostic-instrument designers use the AT25640B-MAHL-T for calibration coefficient and patient-log retention because of its medical-grade reliability. The 32-byte page write aligns with typical calibration-block sizes, and write-protect on the upper quarter lets designers reserve a read-only factory zone that can never be erased by field firmware. With 1 µA standby current, the device adds negligible load to battery-backed medical devices; in a glucose meter drawing 50 µA quiescent from a CR2032 cell, the EEPROM contributes only 2% of standby drain. The 100-year data retention meets medical device archival requirements (typically 10+ years).
Recommended
Asset Tracking and IoT Node Identity
The AT25640B-MAHL-T serves as a tamper-evident identity and firmware-history store for asset trackers, smart sensors, and Industrial IoT nodes. Its 8 KB array holds device certificates, MAC IDs, calibration certificates, and firmware revision history with room to spare. The SPI interface pairs naturally with sub-GHz or BLE SoCs that expose SPI master ports, and the 8-UDFN package is well-suited to coin-cell powered trackers where PCB area is limited. With hardware write-protect on pin 3 (WP), designers can disable field writes by pulling WP high, preventing unauthorized firmware modification. Combined with a real-time clock, the chip provides a complete tamper-evident event log.
Recommended
Consumer Appliance User-Setting Retention
In washing machines, dishwashers, ovens, and HVAC thermostats, the AT25640B-MAHL-T retains user-selected programs, schedules, and preferences across power cycles. The wide 1.8 V to 5.5 V operating range accommodates both battery-backed time-of-day memory and direct 5 V mains-powered MCU rails. With a 5 ms write time and 32-byte page buffer, the device quickly commits user settings without blocking the appliance UI - faster than the perceptible 100 ms user-experience threshold. The -40 °C to +85 °C industrial temperature range ensures reliable operation in unheated garages, basements, and outdoor equipment cabinets. The 8-UDFN package minimizes PCB area in space-constrained control panels.
Recommended
Automotive Aftermarket Accessory Memory
For non-safety-critical automotive aftermarket devices such as dashcams, head-unit upgrades, OBD-II dongles, and GPS loggers, the AT25640B-MAHL-T provides robust 64 Kbit storage. Its -40 °C to +85 °C industrial temperature range handles the under-dash thermal environment, and 1 million write cycles per page supports frequent event-log overwrites. The SPI bus pairs naturally with GPS and Bluetooth modules, and the 8-UDFN package fits compact enclosures. Designers can split the array into event-log (lower 3/4) and configuration (upper 1/4, software-protected) zones to prevent field firmware from corrupting factory settings. The exposed pad provides excellent vibration resistance.
Recommended
Test and Measurement Instrument Calibration
Bench-top multimeters, oscilloscopes, function generators, and RF analyzers use the AT25640B-MAHL-T for NIST-traceable calibration coefficient storage and last-calibration date/time stamping. With 100-year data retention and 1 million write cycles, the device outlives most service intervals and survives factory re-calibrations for decades. The 8 KB array stores thousands of per-range, per-function calibration values with room for serial numbers and signed certificates. The hardware write-protect pin lets the manufacturer lock the factory calibration zone so end-users cannot accidentally erase regulatory coefficients. The 20 MHz SPI throughput enables near-instantaneous full-chip reads at boot.
Recommended
Recommended Products Summary
Engineering reference data for AT25640B-MAHL-T — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | AT25640B-MAHL | AT25640B-SSHL-T | AT25320B-MAHL-T | 25AA640-I/SN | 25LC640-E/SN |
|---|---|---|---|---|---|---|
| Package | 8-UDFN (2x3 mm) with exposed pad | 8-UDFN (2x3 mm) - same | 8-SOIC (5.0 mm) - different land pattern | 8-UDFN (2x3 mm) - same | 8-SOIC (5.0 mm) - different land pattern | 8-SOIC (5.0 mm) - different land pattern |
| Brand | Microchip Technology | Microchip Technology - same brand | Microchip Technology - same brand | Microchip Technology - same brand | Microchip Technology - same brand | Microchip Technology - same brand |
| Memory Density | 64 Kbit (8192 x 8) | 64 Kbit - same | 64 Kbit - same | 32 Kbit (4096 x 8) - 50% less | 64 Kbit - same | 64 Kbit - same |
| Interface | SPI (Modes 0, 3) | SPI - same | SPI - same | SPI - same | I2C - different | I2C - different |
| Maximum Clock Frequency | 20 MHz @ 5 V | 20 MHz - same | 20 MHz - same | 20 MHz - same | 400 kHz (I2C) | 400 kHz (I2C) |
| Supply Voltage (Vcc) | 1.8 V to 5.5 V | 1.8 V to 5.5 V - same | 1.8 V to 5.5 V - same | 1.8 V to 5.5 V - same | 1.8 V to 5.5 V - same | 2.5 V to 5.5 V - narrower |
| Page Write Buffer Size | 32 bytes | 32 bytes - same | 32 bytes - same | 32 bytes - same | 16 bytes - smaller | 16 bytes - smaller |
| Write Endurance / Retention | >1M cycles / 100 years | >1M / 100 yr - same | >1M / 100 yr - same | >1M / 100 yr - same | >1M / 200 yr | >1M / 200 yr |
| Approx. Unit Price (qty 1000) | $0.44 | $0.44 - same | $0.40 - lower | $0.38 - lower | $0.42 - similar | $0.40 - lower |
Key Differentiators
- Highest-density 8-UDFN (2x3) SPI EEPROM in Microchip AT25640B family (vs AT25320B-MAHL-T (32 Kbit))
- 20 MHz SPI vs I2C at 400 kHz enables 50x faster block transfers (vs 25AA640-I/SN (I2C))
- Wide 1.8 V to 5.5 V Vcc covers coin-cell to 5 V rails (vs 25LC640-E/SN (I2C, 2.5 V min))
Design Notes
Place a 0.1 µF X7R ceramic decoupling capacitor within 2 mm of the VCC pin (pin 8) of the AT25640B-MAHL-T. Tie the HOLD pin (pin 7) to VCC through a 10 kΩ pull-up if it is not actively used, and tie WP (pin 3) high to disable all writes. The exposed thermal pad on the bottom of the UDFN-8 package must be soldered to the ground plane for mechanical reliability and thermal dissipation; do not leave it floating.
The AT25640B-MAHL-T supports SPI at up to 20 MHz at 5 V. At maximum clock rate, route the SCK, SI, SO, and CS traces as a matched-length bus (delta <5 mm) over a continuous ground plane. Add 33 Ω series damping resistors on SCK, SI, and SO if trace length exceeds 50 mm or if the host is a different voltage domain. Always observe a 5 ms tWR delay after a Write command before reading STATUS register bits to avoid premature busy-flag polling.
Do not apply a write command while CS is de-asserted (high) - the device will silently ignore it but the host will read garbage. Always assert CS low for the full duration of an instruction including its data bytes. The WP pin protects the entire array when low (full write-protect), which differs from the BP1/BP0 block-protect registers; read STATUS register bit 1 (BP0) and bit 2 (BP1) before issuing WRSR commands to avoid locking the array. In multi-master SPI environments (rare but possible with dual-MCU designs), always check the BUSY flag in the STATUS register before issuing a WRITE.
Compliance Information
AT25640B-MAHL-T is RoHS and REACH compliant per the product datasheet; not AEC-Q100 qualified. For AEC-Q100 grade-1 automotive applications, use Microchip AT25640B automotive-qualified variants in the same UDFN package.
