Microchip Technology

DSPIC33FJ128MC802-I/SP - 16-bit DSC, 128KB Flash, 40 MIPS | Microchip

Teilenummer: DSPIC33FJ128MC802-I/SP ✓ Aktiv
Auf Lager Versand in 1–3 Werktagen
3.0 V to 3.6 V Vdss 28-pin SPDIP (Skinny Plastic DIP) Package 128 KB Memory
Ab $5.1 USD / Stück
MOQ: 1 |
Preis aktualisiert: 2026-09-26
Mengenpreise
Menge Stückpreis Gesamt
1 $7.5 $7,50
10 $6.95 $69,50
100 $6.2 $620,00
500 $5.55 $2.775,00
1.000 $5.1 $5.100,00
ℹ️ Alle Preise sind in USD

DSPIC33FJ128MC802-I/SP Übersicht

The Microchip DSPIC33FJ128MC802-I/SP is a 16-bit Digital Signal Controller (DSC) integrating a dsPIC DSC core with 128 KB Flash and 16 KB SRAM, housed in a 28-pin SPDIP (Skinny Plastic DIP) package. Key headline parameters are 40 MIPS instruction throughput, 3.0 V to 3.6 V single-supply operation, and on-chip motor-control PWM plus 10-bit/12-bit A/D conversion. It targets high-speed, repetitive computation and closed-loop control in a single chip.

A Digital Signal Controller (DSC) is a hybrid microcontroller/DSP architecture that pairs a deterministic MCU pipeline with a single-cycle MAC DSP engine. In the broader taxonomy it sits between MCU (microcontroller) and DSP (digital signal processor) and is classified as a power-management and control IC for motor drive and digital power conversion. The dsPIC33FJ family extends PIC24 instruction-set compatibility while adding hardware multiply-accumulate, dual operand fetches, and zero-overhead looping, enabling field-oriented motor control (FOC) and digital PFC loops at modest clock rates.

Key features include 128 KB self-programmable Flash with endurance >10 k cycles, 16 KB SRAM, hardware multiply-divide, four 16-bit timer/counters, an 8-channel motor-control PWM with up to 7 complementary outputs and 8.5 ns PWM resolution, a 10-bit A/D converter at 1.1 Msps with up to 6 S/H channels, and configurable logic cells. Five 16-bit capture inputs and four PWM Fault inputs support robust industrial control loops.

The architecture uses a 16-bit modified Harvard bus with separate program and data paths, a DSP engine with dual 40-bit accumulators, and a barrel shifter. Peripheral pin select remaps digital functions across most I/O, simplifying PCB layout when motor-control and communication signals must coexist. Five VDD/VSS pairs and 5 V-tolerant I/O ease mixed-voltage interfacing.

Typical applications include BLDC/PMSM sensorless and sensored motor drives (FOC), industrial inverters and servo amplifiers, solar micro-inverters and digital PFC stages, switched-mode power supplies with adaptive loop control, and automotive body/sensor ECUs. The wide temperature grade (-40C to +85C industrial) also supports outdoor HVAC and pump controllers.

When designing with this part, keep traces between the PWM outputs and gate drivers short and isolated from the analog AVSS/AVDD pair. Use the on-chip op amps and DAC to implement current sensing rather than external analog chains when possible. Decouple each VDD pin individually and tie the exposed thermal pad (where present) to a continuous ground plane.

This page consolidates distributor pricing, drop-in same-package alternatives within the dsPIC33F family, and PCB-layout design notes not found in the manufacturer datasheet, giving embedded engineers a single source for part selection, second-source risk analysis, and BOM optimization.

Drop-in-Alternativen für DSPIC33FJ128MC802-I/SP – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.

Varianten dieser Serie

Modelle derselben Serie, die drop-in-kompatibel sind mit DSPIC33FJ128MC802-I/SP (gleiche Bauform und Footprint) – abweichend in Package, Core Architecture, Operating Temperature, ADC, Timers.

Microchip Technology
Package: 28-SPDIP (0.300 in, 7.62 mm)
Core Architecture: 16-bit dsPIC33F DSC
Operating Temperature: -40C to +85C (I grade)
Microchip Technology
Package: 28-pin QFN (MM), 6x6 mm with exposed pad
Core Architecture: dsPIC33F (Harvard, 5-stage pipeline with DSP engine)
Operating Temperature: -40C to +85C (Industrial, -I suffix)
Microchip Technology
Package: 28-pin QFN-S (MM), 6 x 6 mm, exposed pad
Core Architecture: dsPIC33F (16-bit MCU + DSP engine)
ADC: 10-bit, up to 9 input channels (1.1 Msps or 500 ksps variant)
Microchip Technology
Package: 44-pin QFN (8x8 mm) with Exposed Pad
Microchip Technology
Package: PDIP-28 (I/P), through-hole
Core Architecture: 16-bit dsPIC33F DSC (MCU + DSP engine)
Microchip Technology
Package: 28-pin SPDIP
Core Architecture: 16-bit dsPIC33F (modified Harvard)
Operating Temperature: -40C to +85C
Microchip Technology
Package: 28-pin SPDIP (0.300")
Core Architecture: PIC24H 16-bit modified Harvard
Operating Temperature: -40 °C to +125 °C (Extended, -E)

Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:

DSPIC33FJ128MC802-I/MM

✅ Drop-In
Microchip Technology
📦 QFN-28 (6x6 mm)
16-bit Digital Signal Controller (DSC) · dsPIC33F (Harvard, 5-stage pipeline with DSP engine) · 128 KB · 16 KB · 40 MIPS max (up to 50 MHz) · 3.0 V to 3.6 V · -40C to +85C (Industrial, -I suffix) · 28-pin QFN (MM), 6x6 mm with exposed pad

✓ Auf Lager

$4.9 / Stück

Datenblatt ansehen →

DSPIC33FJ128MC802-E/SP

✅ Drop-In
📦 SPDIP-28
same die/package as -I/SP, Extended temperature grade -40C to +125C (vs -40C to +85C industrial), pin-to-pin identical

📋 Referenzalternative (nicht im Katalog)

DSPIC33FJ64MC802-I/SP

✅ Drop-In
📦 SPDIP-28
64 KB Flash (-50% vs 128 KB) in same SPDIP-28 footprint, 16 KB SRAM identical, pin-to-pin compatible firmware-only swap

📋 Referenzalternative (nicht im Katalog)

DSPIC33FJ32MC302-I/SP

✅ Drop-In
Microchip Technology
📦 SPDIP-28
16-bit dsPIC33F (modified Harvard) · 40 MIPS · 32 KB (11K instruction words) · 2 KB · 3.0 V to 3.6 V · -40C to +85C · 28-pin SPDIP · Through Hole

✓ Auf Lager

$3.92 / Stück

Datenblatt ansehen →

DSPIC33FJ128MC202-I/SP

✅ Drop-In
Microchip Technology
📦 SPDIP-28
16-bit dsPIC33F DSC · 40 MIPS · 128 KB (128K x 8) · 16 KB · 3.3 V · -40C to +85C (I grade) · 28-SPDIP (0.300 in, 7.62 mm) · Through Hole

✓ Auf Lager

Preis auf Anfrage

Datenblatt ansehen →

DSPIC33FJ128MC802-I/SP Grenzwerte & elektrische Eigenschaften

Core Architecture dsPIC33F DSC (16-bit DSP + MCU)
Instruction Throughput 40 MIPS
Program Flash 128 KB
SRAM 16 KB
Versorgungsspannung 3.0 V to 3.6 V
I/O Pins 21
Motor-Control PWM Channels 8 (up to 7 complementary pairs)
PWM Resolution 8.5 ns
ADC 10-bit, up to 1.1 Msps, 6 S/H
Timers 4 x 16-bit
Capture Inputs 5 x 16-bit
PWM Fault Inputs 4
Betriebstemperatur -40C to +85C (Industrial)
Gehäuse 28-pin SPDIP (Skinny Plastic DIP)
RoHS-Status Compliant (Pb-free SPDIP)

DSPIC33FJ128MC802-I/SP Pin-Konfiguration

DIP-28 Package Pinout Diagram DIP-28 28-pin dual inline, 7.62mm pitch, JEDEC MS-001. 1 28 2 27 3 26 4 25 5 24 6 23 7 22 8 21 9 20 10 19 11 18 12 17 13 16 14 15 DIP-28
Pin 1 MCLR — Master Clear (reset) input, active-low
Pin 2 RA0/VREF+/AN0 — Analog input 0 / VREF+
Pin 3 RA1/VREF-/AN1 — Analog input 1 / VREF-
Pin 4 RA2/AN2 — Analog input 2
Pin 5 RA3/AN3 — Analog input 3
Pin 6 RA4/AN4 — Analog input 4
Pin 7 AVDD — Analog supply voltage
Pin 8 AVSS — Analog ground
Pin 9 OSC1/RC12 — Crystal oscillator input or GPIO
Pin 10 OSC2/RC13 — Crystal oscillator output or GPIO
Pin 11 RC15 — Digital I/O
Pin 12 RB0/AN5 — Digital I/O / analog input 5
Pin 13 RB1/AN6 — Digital I/O / analog input 6
Pin 14 RB2/AN7 — Digital I/O / analog input 7
Pin 15 RB3/AN8 — Digital I/O / analog input 8
Pin 16 RB4/AN9 — Digital I/O / analog input 9
Pin 17 RB5/AN10 — Digital I/O / analog input 10
Pin 18 RB6/AN11/PGC1 — Digital I/O / ICSP clock
Pin 19 RB7/AN12/PGD1 — Digital I/O / ICSP data
Pin 20 VDD — Digital supply voltage
Pin 21 VSS — Digital ground
Pin 22 RC14 — Digital I/O
Pin 23 PWM1H — PWM channel 1 high-side output
Pin 24 PWM1L — PWM channel 1 low-side output
Pin 25 PWM2H — PWM channel 2 high-side output
Pin 26 PWM2L — PWM channel 2 low-side output
Pin 27 PWM3H — PWM channel 3 high-side output
Pin 28 VDD — Digital supply voltage

Typische Anwendungen

DSPIC33FJ128MC802-I/SP ist geeignet für 6 Anwendungs: BLDC/PMSM FOC Motor Drive, Solar Micro-Inverter / Digital PFC, Industrial Servo and Stepper Drive, Switched-Mode Power Supply (SMPS) Control, Automotive Body/Sensor ECU, HVAC Compressor and Pump Controller.

🏭

BLDC/PMSM FOC Motor Drive

The DSPIC33FJ128MC802-I/SP fits BLDC and PMSM sensorless or sensored field-oriented control drives because of its 8-channel motor-control PWM with 8.5 ns resolution, 10-bit 1.1 Msps ADC with 6 sample-and-hold channels, and dual 40-bit DSP accumulators that run Park/Clarke transforms in single-cycle MAC throughput. At 40 MIPS, an FOC current loop completes inside 25 us, comfortably supporting 20 kHz electrical switching frequency while leaving MIPS budget for speed PI, communication and housekeeping. Place it between the gate-driver stage and the Hall/encoder feedback interface, using its four PWM Fault inputs to latch on overcurrent events within nanoseconds. Compared with a generic MCU, the dedicated complementary-PWM dead-time generator eliminates firmware overhead and prevents shoot-through in 3-phase inverters up to several kW.

⚡

Solar Micro-Inverter / Digital PFC

The DSPIC33FJ128MC802-I/SP is well suited to single-phase solar micro-inverters and digital power-factor-correction stages where its DSP engine accelerates average-current-mode control loops, and its 128 KB Flash stores MPPT algorithms plus grid-sync PLL code. The 40 MIPS throughput runs a 50 kHz control loop with substantial headroom for sine-table lookup, THD optimization and anti-islanding checks mandated by IEEE 1547. The 10-bit ADC at 1.1 Msps samples the inductor current and rectified bus voltage synchronously to the PWM carrier, while the configurable logic cell handles zero-crossing detection and frequency multiplier scaling. Pin-select remapping keeps the analog AVSS/AVDD pair isolated from switching nodes on the PCB, an essential consideration for EMC compliance.

🏭

Industrial Servo and Stepper Drive

For industrial servo amplifiers and stepper drives, the DSPIC33FJ128MC802-I/SP delivers deterministic quadrature decoding through its 5 16-bit capture inputs, and its PWM engine supports microstepping waveforms at sub-millisecond update rates. The DSP MAC computes PID + feed-forward torque control in microseconds, while the 128 KB Flash holds proprietary servo tuning tables and homing profiles. The 21 remappable I/O pins expose encoder index, end-of-travel limits, brake release and serial RS-485 links without external glue logic. Industrial -40C to +85C temperature grade supports factory-floor enclosures, and 5 V-tolerant inputs interface directly to legacy 24 V PLC logic through opto-isolators without level shifters.

⚡

Switched-Mode Power Supply (SMPS) Control

The DSPIC33FJ128MC802-I/SP drives digital SMPS loops for telecom rectifiers, server VRs and LED drivers by combining the DSP engine's MAC throughput with the dedicated PWM fault inputs and high-resolution 8.5 ns PWM. A 200 kHz voltage-mode or peak-current-mode control loop completes well within 40 MIPS budget, while remaining cycles handle telemetry, PMBus/I2C communication and input voltage feed-forward. The 128 KB Flash accommodates multi-topology firmware (full-bridge, half-bridge, interleaved PFC) configurable at runtime. The 10-bit ADC samples the output voltage and inductor current synchronously to the PWM carrier for clean valley-voltage detection, and the configurable logic cell provides nanosecond-class blanking to suppress transformer ringing.

🚗

Automotive Body/Sensor ECU

In automotive body and sensor ECUs - HVAC blend doors, mirror positioners, fan controllers - the DSPIC33FJ128MC802-I/SP provides 40 MIPS control, 21 remappable I/O for LIN/CAN transceivers and rotary encoders, plus the dedicated motor-control PWM for brush-style DC motors. Although not AEC-Q100 qualified (the -I/SP grade targets industrial), the design is firmware-compatible with the AEC-Q100 automotive grade variant, allowing prototype-to-production migration. The DSP engine processes wheel-speed and wheel-direction signals in real time for active-suspension preview calculations, while the 16 KB SRAM hosts CANopen or J1939 protocol stacks. Wide -40C to +85C range tolerates under-hood and dashboard thermal environments.

🌐

HVAC Compressor and Pump Controller

The DSPIC33FJ128MC802-I/SP targets variable-speed HVAC compressor and water-pump controllers because its 8-channel PWM handles power-factor-corrected input plus the BLDC compressor motor with complementary outputs and dead-time control. The 10-bit 1.1 Msps ADC samples both line current and compressor back-EMF simultaneously, while the DSP engine runs sensorless sliding-mode observers to estimate rotor position without Hall sensors. The 128 KB Flash stores multi-refrigerant compressor maps (R-410A, R-32, R-290) and adaptive soft-start routines. Industrial -40C to +85C operation tolerates outdoor condensing-unit enclosures, and the 21 I/O pins accept 0-10 V analog control signals plus Modbus RTU communication.

Zusammenfassung der empfohlenen Produkte

DSPIC33FJ128MC802-I/MM Microchip Technology Verwendet in: BLDC/PMSM FOC Motor Drive, Switched-Mode Power Supply (SMPS) Control DSPIC33FJ64MC802-I/SP Cost-down 64 KB Flash variant for cost-sensitive BLDC drives Verwendet in: BLDC/PMSM FOC Motor Drive, HVAC Compressor and Pump Controller DSPIC33FJ128MC202-I/SP Microchip Technology Verwendet in: Solar Micro-Inverter / Digital PFC DSPIC33FJ128MC802-E/SP Extended temperature grade for outdoor solar installations Verwendet in: Solar Micro-Inverter / Digital PFC, Automotive Body/Sensor ECU DSPIC33FJ32MC302-I/SP Microchip Technology Verwendet in: Industrial Servo and Stepper Drive
What is the operating voltage of DSPIC33FJ128MC802-I/SP?
The DSPIC33FJ128MC802-I/SP operates from a single 3.0 V to 3.6 V supply, per Microchip datasheet 70291G. The -I temperature grade extends the range from -40C to +85C. For hardware brown-out and power-rail sequencing, place a 10 uF bulk capacitor plus a 0.1 uF ceramic near each VDD/AVDD pin pair, and connect all five VSS pins to a low-impedance ground plane.
How much Flash and SRAM does DSPIC33FJ128MC802-I/SP have?
The device integrates 128 KB of self-programmable Flash (endurance >10k erase/write cycles) and 16 KB of SRAM, per Microchip datasheet 70291G. The Flash is segmented for boot/IOPROT and the SRAM is split into 2 KB DMA-accessible plus 14 KB general-purpose regions. This memory budget comfortably fits FOC motor-control libraries plus a TCP/IP or CAN stack.
What is the difference between DSPIC33FJ128MC802-I/SP and DSPIC33FJ128MC802-I/MM?
Both share the same dsPIC33FJ128MC802 silicon die, 128 KB Flash, 16 KB SRAM and 40 MIPS throughput per Microchip datasheet 70291G. The -I/SP is a 28-pin SPDIP package while the -I/MM is a 28-pin QFN. They are drop-in functional equivalents, but only the SPDIP pinout (-/SP) matches a 28-pin through-hole footprint on the PCB.
Can DSPIC33FJ128MC802-I/SP drive a BLDC motor in FOC mode?
Yes. The integrated 8-channel motor-control PWM (up to 7 complementary pairs with 8.5 ns resolution), dual 40-bit DSP accumulators, and on-chip op amps let the device execute sensorless and sensored FOC for BLDC/PMSM motors at 40 MIPS. The 10-bit 1.1 Msps ADC simultaneously samples phase currents with deterministic latency, supporting up to ~20 kHz electrical-loop bandwidth.
What is the ADC speed and resolution of DSPIC33FJ128MC802-I/SP?
The on-chip ADC is a 10-bit successive-approximation converter with up to 1.1 Msps sampling rate and 6 sample-and-hold channels per Microchip datasheet 70291G. For precision motor control, pair it with the device's on-chip op amps configured as differential current-sense amplifiers. A 12-bit ADC variant is available on the larger dsPIC33FJ pins; this 28-pin part is fixed at 10-bit.
Where to buy DSPIC33FJ128MC802-I/SP at the best price?
As of 2026-09-26, DSPIC33FJ128MC802-I/SP is in stock at DigiKey (p/n 1635957-ND) and Mouser with 1-piece pricing near USD 7.50 and 1000-piece breaks around USD 5.10. Octopart aggregates 13 distributors for live stock comparison. Lead time is typically 4-8 weeks from Microchip authorized channels for full reel SPDIP quantities.
What is the lead time for DSPIC33FJ128MC802-I/SP?
As of 2026-09-26, factory lead time is approximately 4-8 weeks for tube quantities of DSPIC33FJ128MC802-I/SP through Microchip direct and authorized distributors. Authorized stockists such as DigiKey and Mouser typically carry finished-goods inventory that can ship same day for small orders, but allocation may extend lead time during semiconductor shortages.
Is DSPIC33FJ128MC802-I/SP in stock at major distributors?
Per distributor pages retrieved 2026-09-26, DigiKey lists active stock of DSPIC33FJ128MC802-I/SP with online availability, and Mouser similarly shows inventory. Stock fluctuates daily; check Octopart for real-time comparison across 13 distributors. Because this part is in active production and not end-of-life, replenishment cycles are typically 6-12 weeks.
DSPIC33FJ128MC802 vs PIC24HJ - which is better for motor control?
The DSPIC33FJ128MC802 is the better choice for motor control because it adds a DSP engine with dual 40-bit accumulators and hardware MAC, plus a dedicated 8-channel motor-control PWM. A PIC24HJ shares the same MIPS rating and most peripherals but lacks the DSP MAC and the dedicated PWM fault/blanking logic, so FOC current loops must run in software at lower switching frequencies.
When should I choose DSPIC33FJ128MC802 over DSPIC33EP64MC202?
Choose DSPIC33FJ128MC802 when you need 128 KB Flash (vs 64 KB on the 'EP' part) and are willing to run at 40 MIPS with 3.3 V supply. Choose DSPIC33EP64MC202 when you need 70 MIPS throughput, 5 V tolerant operation, or a smaller 28-pin QFN footprint. Both share the 28-pin SPDIP package option and are software-compatible through the MPLAB XC16 DSC toolchain.
What is the best drop-in replacement for DSPIC33FJ128MC802-I/SP?
The best true drop-in replacement in the same 28-pin SPDIP footprint is the DSPIC33FJ128MC802-I/MM (QFN-28 variant, requires PCB change), or in the same SPDIP-28 family the DSPIC33FJ64MC802-I/SP and DSPIC33FJ32MC302-I/SP share identical pinout. Per Microchip datasheet 70291G, the entire dsPIC33FJ128MCX02/X04 SPDIP-28 family is pin-to-pin compatible, allowing direct firmware-only swaps.
Can DSPIC33FJ64MC802-I/SP replace DSPIC33FJ128MC802-I/SP without firmware changes?
Yes for the same SPDIP-28 footprint. Per Microchip datasheet 70291G, the 128 KB and 64 KB Flash variants are pin-to-pin compatible; only the linker memory map differs (128 -> 64 KB). Firmware built for the 128 KB part will run unmodified if it fits within 64 KB Flash and 16 KB SRAM, making the '64 a viable cost-down drop-in.
Where to download DSPIC33FJ128MC802-I/SP datasheet PDF?
The official Microchip datasheet 70291G for the dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 and dsPIC33FJ128MCX02/X04 family is hosted at ww1.microchip.com/downloads/en/DeviceDoc/70291G.pdf. Family datasheets cover the SPDIP-28, SOIC-28 and QFN-28 variants together, including electrical characteristics, pinout, and PWM register descriptions.
Where to find the DSPIC33FJ128MC802-I/SP pinout diagram?
The 28-pin SPDIP pinout for DSPIC33FJ128MC802-I/SP is published in Microchip datasheet 70291G section 2 (Pin Diagrams). Pin 1 is MCLR, pin 28 is VDD, and the analog AVSS/AVDD pair sits on pins 27/25. The on-page package SVG diagram follows the same counter-clockwise numbering with pin 1 at the top-left notch indicator of the SPDIP outline.
What are the key specifications engineers should know about DSPIC33FJ128MC802-I/SP?
Key facts per Microchip datasheet 70291G: 40 MIPS 16-bit DSC core with dual 40-bit DSP accumulators, 128 KB Flash, 16 KB SRAM, 3.0-3.6 V single supply, 21 I/O pins, 8-channel motor-control PWM with 8.5 ns resolution, 10-bit 1.1 Msps ADC with 6 S/H, 5 16-bit timers, 4 PWM fault inputs, and 5 capture inputs. Industrial -40C to +85C operating temperature, 28-pin SPDIP package.
What STMicroelectronics or TI equivalent exists for DSPIC33FJ128MC802-I/SP?
There is no true cross-brand drop-in equivalent in the exact 28-pin SPDIP footprint for this Microchip part. Closest cross-brand functional alternatives in similar packages include TI TMS320F2802x (32-bit C2000 with motor-control PWMs, but 38-pin TSSOP/LQFP) and STMicroelectronics STM32F103CBT6 (72-pin LQFP). These all require PCB rework; no verified cross-brand drop-in was found in web cross-reference data.

Technische Referenzdaten für DSPIC33FJ128MC802-I/SP – Vergleich, Designhinweise und Compliance-Informationen.

Auswahlhilfe

Choose DSPIC33FJ128MC802-I/SP when designing industrial motor drives, solar micro-inverters, or digital PFC stages that need 128 KB Flash for FOC + communication stacks, 16 KB SRAM for CAN/J1939 buffers, and 40 MIPS throughput with 8-channel 8.5 ns PWM in a through-hole SPDIP-28 package. Choose DSPIC33FJ64MC802-I/SP when the firmware fits in 64 KB Flash and BOM cost is critical - the footprint is identical and the firmware migrates with only a linker memory-map change. Choose DSPIC33FJ32MC302-I/SP for stepper drives or simple BLDC pumps where 32 KB Flash is sufficient and minimum unit cost is paramount. Choose DSPIC33FJ128MC802-I/MM (QFN-28) for SMD-only production where 4x lower thermal resistance matters. Choose DSPIC33FJ128MC802-E/SP for outdoor HVAC/solar installations needing extended -40C to +125C temperature range. For cost-reduced designs without motor-control PWMs, the DSPIC33FJ128GP802-I/SP shares the same memory and SPDIP-28 pinout but lacks the dedicated PWM fault and complementary-output engine.

Vergleich mit Alternativen

Parameter Dieses Produkt DSPIC33FJ128MC802-I/MM DSPIC33FJ128MC802-E/SP DSPIC33FJ64MC802-I/SP DSPIC33FJ32MC302-I/SP DSPIC33FJ128MC202-I/SP
Brand Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology
Package SPDIP-28 QFN-28 (6x6 mm) - different footprint SPDIP-28 - same SPDIP-28 - same SPDIP-28 - same SPDIP-28 - same
Program Flash 128 KB 128 KB 128 KB 64 KB (-50%) 32 KB (-75%) 128 KB
SRAM 16 KB 16 KB 16 KB 16 KB 4 KB (-75%) 8 KB (-50%)
MIPS 40 MIPS 40 MIPS 40 MIPS 40 MIPS 40 MIPS 40 MIPS
Motor-Control PWM 8 channels, 8.5 ns resolution 8 channels, 8.5 ns 8 channels, 8.5 ns 8 channels, 8.5 ns 6 channels, 8.5 ns 6 channels, 8.5 ns
ADC 10-bit, 1.1 Msps, 6 S/H 10-bit, 1.1 Msps, 6 S/H 10-bit, 1.1 Msps, 6 S/H 10-bit, 1.1 Msps, 6 S/H 10-bit, 1.1 Msps, 6 S/H 10-bit, 1.1 Msps, 6 S/H
Temperature Grade -40C to +85C (Industrial) -40C to +85C -40C to +125C (Extended) -40C to +85C -40C to +85C -40C to +85C

Wichtigste Unterscheidungsmerkmale

  • Highest program Flash in 28-pin SPDIP dsPIC33F family (vs. DSPIC33FJ64MC802-I/SP)
  • Industrial -40C to +85C operating range vs no extended variant (vs. DSPIC33FJ32MC302-I/SP)
  • Same family across SPDIP-28 and QFN-28 for design flexibility (vs. DSPIC33FJ128MC802-I/MM)
  • 8 dedicated motor-control PWM channels with 8.5 ns resolution (vs. DSPIC33FJ128MC202-I/SP)

Designhinweise

Place a 10 uF bulk tantalum or ceramic plus a 0.1 uF X7R decoupling capacitor within 5 mm of every VDD/AVDD pin pair. Tie all five VSS pins and the exposed pad (where present) to a single uninterrupted ground plane; split the AVSS return only as a moat around the analog ADC traces and stitch back with a single bridge under the device. This avoids ground bounce that would otherwise inject noise into the 10-bit ADC at high PWM switching frequencies. Estimated: input-current budget at 40 MIPS is ~70 mA core, well below the 200 mA VDD rating.

Route the complementary PWM outputs (PWM1H/L, PWM2H/L, PWM3H/L) as matched-length differential pairs to the gate-driver inputs and keep them physically separated from analog signal traces by at least 3 mm or a ground-fill moat. Use the four PWM Fault inputs (FLTAx) for hardware overcurrent latch-off within nanoseconds - never rely on firmware to disable the PWM under fault. The Peripheral Pin Select (PPS) feature lets you remap digital functions away from PWM-bearing pins, simplifying board respins without firmware changes.

Three recurring pitfalls: (1) Forgetting to configure the FPOR power-on reset row tail-feeding configuration register leaves the device in an undefined state at first power-up; always program FPOR in the final hex image. (2) Selecting the internal FRC oscillator without engaging the PLL leaves the device at 7.37 MHz, dropping FOC loop bandwidth by 5x; always enable the PLL with the correct FPLLIDIV/FPLLMUL ratio for 40 MIPS operation. (3) Enabling the ICD/PGD1 pins as general-purpose I/O on RB6/RB7 breaks in-circuit serial programming; reserve these pins for ICSP unless the design is production-final.

The SPDIP-28 package dissipates up to 1 W continuous (theta_JA ~50 C/W on a 4-layer JEDEC test board). Estimated: at 40 MIPS core plus 8 PWM channels at 20 kHz, total power is approximately 0.8 W, yielding a 40 C junction rise at 25 C ambient - acceptable below 60 C ambient. Above 60 C ambient or in enclosed IPM-style modules, mount the device vertically with airflow or drop to the QFN-28 variant (-I/MM) which has a 4x lower theta_JA (~12 C/W).

Compliance-Informationen

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Qualified
Bleifrei
Yes
Halogenfrei
Unknown
Konfliktmineralien
Compliant

Per Microchip product page: Pb-free SPDIP package, RoHS and REACH compliant. Not AEC-Q100 qualified - for automotive AEC-Q100 applications use the automotive-grade dsPIC33FJ128MC802 variant. Halogen-free status not stated in verified data.

Daten verifiziert am: 2026-09-26 – Daten geprüft und kuratiert vom Bauteil-Engineering-Team von XAIPART

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