HI5767/2IAZ - 10-Bit 20MSPS ADC w/ Vref, 28-SSOP | Renesas
Teilenummer: HI5767/2IAZ ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $7.45 | $7,45 |
| 10 | $6.8 | $68,00 |
| 100 | $5.95 | $595,00 |
| 500 | $5.3 | $2.650,00 |
| 1.000 | $4.65 | $4.650,00 |
HI5767/2IAZ Übersicht
An ADC (analog-to-digital converter) is a data-converter integrated circuit that samples continuous analog voltages and produces a discrete digital code proportional to the input. Within the broader taxonomy, the HI5767 belongs to pipelined ADCs (sub-class of Nyquist-rate ADCs) -> data converters -> signal-chain ICs -> mixed-signal semiconductors. Pipelined ADCs trade slightly higher latency for high sample rates and low per-conversion power, making them the workhorse of video, imaging, communications, and instrumentation front ends.
Key features of the HI5767/2IAZ include 10-bit resolution, single +5 V analog supply, internal 2.5 V reference, TTL/CMOS-compatible digital outputs, and a 28-SSOP industrial-temperature (-40C to +85C) package. The pipelined architecture supports throughputs of 20, 40, or 60 MSPS, selectable via part suffix, and the low input capacitance (~5 pF) eases the design of the driving amplifier network. Differential nonlinearity (DNL) is typically within +/-0.5 LSB, ensuring no missing codes at 10 bits.
Typical applications include digital video, set-top box and graphics digitizers, CCD imaging front ends, cable modem upstream/downstream IF digitizers, medical ultrasound receivers, and general-purpose high-speed data acquisition cards. The wide input bandwidth and low power (~140 mW at 60 MSPS) suit portable and line-powered designs alike. The internal reference eliminates the need for an external reference IC, saving board area and BOM cost.
When designing with this part, observe the recommended single-point grounding scheme, decouple AVDD and DVDD separately with 0.1 uF + 10 uF capacitors, and drive the analog input with a low-impedance, bandwidth-appropriate op-amp such as the HA5024 or AD8055. A small RC anti-alias filter at the input is typically required. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in-Alternativen für HI5767/2IAZ – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit HI5767/2IAZ (gleiche Bauform und Footprint) – abweichend in Package, Architecture, Resolution, Operating Temperature, RoHS Status.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
HI5767/4IAZ
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
HI5767/6IAZ
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
HI5766KCAZ
✅ Drop-In✓ Auf Lager
$5.6 / Stück
Datenblatt ansehen →ADS901E/1K
✅ Drop-In✓ Auf Lager
$2.59 / Stück
Datenblatt ansehen →ADS901E/1KG4
✅ Drop-In✓ Auf Lager
$4.12 / Stück
Datenblatt ansehen →HI5714/7CB-T
✅ Drop-In✓ Auf Lager
$9.2 / Stück
Datenblatt ansehen →HI5767/2IAZ Grenzwerte & elektrische Eigenschaften
| Auflösung | 10 bits |
| Sample Rate | 20 MSPS (40/60 MSPS versions exist as -/4 and -/6) |
| Number of Inputs | 1 single-ended analog input |
| Architecture | Pipelined |
| Eingangsspannungsbereich | 1 Vp-p to 2 Vp-p (differential/single-ended, ref-dependent) |
| Analog Supply Voltage | 5 V (single supply) |
| Digital Supply Voltage | 3.3 V or 5 V (DVDD) |
| Internal Reference Voltage | 2.5 V (internal bandgap) |
| Differential Nonlinearity (DNL) | +/-0.5 LSB (typical, no missing codes) |
| Signal-to-Noise Ratio (SNR) | 58 dB (typical at 20 MSPS, 10 MHz input) |
| Power Dissipation | 140 mW (typical at 60 MSPS) |
| Eingangskapazität | 5 pF (typical) |
| Output Format | TTL/CMOS-compatible straight binary |
| Betriebstemperatur | -40C to +85C (industrial) |
| Gehäuse | 28-SSOP (0.154 inch / 3.90 mm body width) |
| Montageart | Surface Mount |
| RoHS-Status | Compliant (per Renesas product page) |
HI5767/2IAZ Pin-Konfiguration
| Pin 1 | AIN — Analog input |
| Pin 2 | REFT — Reference top (decoupling) |
| Pin 3 | REFB — Reference bottom (decoupling) |
| Pin 4 | AVDD — Analog 5 V supply |
| Pin 5 | MODE/CLKDIV — Mode / clock-divide select |
| Pin 6 | AGND — Analog ground |
| Pin 7 | D0 — Digital output bit 0 (LSB) |
| Pin 8 | D1 — Digital output bit 1 |
| Pin 9 | D2 — Digital output bit 2 |
| Pin 10 | D3 — Digital output bit 3 |
| Pin 11 | D4 — Digital output bit 4 |
| Pin 12 | D5 — Digital output bit 5 |
| Pin 13 | D6 — Digital output bit 6 |
| Pin 14 | D7 — Digital output bit 7 |
| Pin 15 | D8 — Digital output bit 8 |
| Pin 16 | D9 — Digital output bit 9 (MSB) |
| Pin 17 | DRVDD — Digital output driver supply |
| Pin 18 | DGND — Digital ground |
| Pin 19 | CLK — Clock input |
| Pin 20 | NC — Not connected (per datasheet) |
| Pin 21 | AVDD — Analog 5 V supply (second tap) |
| Pin 22 | VREF — Internal reference bypass |
| Pin 23 | AGND — Analog ground (second tap) |
| Pin 24 | NC — Not connected (per datasheet) |
| Pin 25 | NC — Not connected (per datasheet) |
| Pin 26 | NC — Not connected (per datasheet) |
| Pin 27 | DVDD — Digital 3.3/5 V supply |
| Pin 28 | DGND — Digital ground (second tap) |
Typische Anwendungen
HI5767/2IAZ ist geeignet für 6 Anwendungs: Digital Video / Set-Top Box Digitizer, CCD Imaging Front End, Cable Modem / QAM IF Sampler, Medical Ultrasound Receiver, General-Purpose High-Speed Data Acquisition Card, Industrial Inspection / Machine Vision.
Digital Video / Set-Top Box Digitizer
The HI5767/2IAZ's 10-bit resolution and 20 MSPS throughput make it a strong fit for digitizing NTSC/PAL composite video and Y/C (S-video) signals in set-top boxes, video capture cards, and graphics digitizers. The 58 dB SNR is more than adequate for non-broadcast consumer video, and the internal 2.5 V reference eliminates an external reference IC, reducing BOM cost. The 5 V single-supply operation simplifies the analog front-end: a low-cost op-amp such as the HA5024 or AD8055 can directly drive the 5 pF input capacitance with a small RC anti-alias filter. The 28-SSOP industrial-temperature package survives the thermal environment of a consumer STB chassis.
Empfohlen
CCD Imaging Front End
The HI5767/2IAZ suits low-cost CCD camera front ends where 10-bit pixel resolution and 20 MSPS pixel rate match entry-level machine-vision and digital-still-camera designs. The pipelined architecture's fixed latency simplifies pixel-to-pixel synchronization with the CCD's H1/H2 clock chain. The differential input structure rejects common-mode noise from the CCD's analog output, and the TTL-compatible digital outputs drive an FPGA image pipeline (sensors, ISPs, and video DACs) directly without level shifters. A clamp circuit on the input restores the DC level between CCD line readouts.
Empfohlen
Cable Modem / QAM IF Sampler
In cable-modem upstream and downstream IF chains, the HI5767/2IAZ digitizes the IF output of the tuner at 20 MSPS, feeding a downstream QAM/QPSK demodulator in the Media Access Controller. The wide input bandwidth (~250 MHz small-signal) supports undersampling of a 36-44 MHz IF, eliminating an analog downconversion stage. The 10-bit dynamic range captures the constellation points with margin for 64-QAM and 256-QAM, and the pipelined latency is acceptable for the 1-2 symbol pipeline delay. Single 5 V supply matches the cable-modem power tree, avoiding an extra LDO.
Empfohlen
Medical Ultrasound Receiver
Portable and mid-range medical ultrasound receivers use the HI5767/2IAZ to digitize the echo signal chain at 20 MSPS per channel, with multi-channel systems ganging several ADCs in parallel. The 58 dB SNR is sufficient for general-purpose B-mode imaging, and the low ~80 mW power dissipation at 20 MSPS helps meet the thermal budget of handheld probes. The internal sample-and-hold removes the need for an external T/H amplifier, and the 28-SSOP industrial-temperature grade supports the -10C to +50C operating range of typical clinical environments.
Empfohlen
General-Purpose High-Speed Data Acquisition Card
PCI/PCIe and PXI data-acquisition cards use the HI5767/2IAZ to digitize signals from a multiplexer front-end at 20 MSPS, feeding a downstream FPGA or DSP for processing. The 10-bit resolution and 58 dB SNR suit vibration analysis, sonar, and instrumentation front ends. The pipelined architecture's deterministic latency simplifies trigger and timing design, and the TTL outputs interface directly to a 3.3 V or 5 V FPGA capture buffer. The 28-SSOP package is easy to route on a 4-layer FR-4 board with controlled-impedance analog input traces.
Empfohlen
Industrial Inspection / Machine Vision
Industrial line-scan cameras and AOI (automated optical inspection) systems use the HI5767/2IAZ to digitize analog video from CCD line sensors at 20 MSPS, with 10 bits providing enough grayscale depth to detect subtle contrast variations on PCB and food-production lines. The wide input bandwidth supports oversampling of the line sensor's pixel rate for noise reduction via downstream averaging. The 28-SSOP industrial-temperature grade handles factory-floor thermal cycling, and the TTL digital outputs drive a 5 V FPGA machine-vision pipeline. The 2.5 V internal reference maintains calibration over the -40C to +85C range.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für HI5767/2IAZ – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | HI5767/4IAZ | HI5767/6IAZ | HI5766KCAZ | ADS901E/1K | HI5714/7CB-T |
|---|---|---|---|---|---|---|
| Package | 28-SSOP | 28-SSOP - same | 28-SSOP - same | 28-SSOP - same | 28-SSOP - same | 28-SSOP - same |
| Brand | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics | Texas Instruments | Renesas Electronics |
| Resolution | 10 bits | 10 bits | 10 bits | 10 bits | 10 bits | 8 bits (-20%) |
| Sample Rate | 20 MSPS | 40 MSPS (+100%) | 60 MSPS (+200%) | 20 MSPS | 20 MSPS | 60 MSPS (+200%) |
| Internal Reference | 2.5 V (yes) | 2.5 V (yes) | 2.5 V (yes) | Yes | Yes | Yes |
| Analog Supply | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V |
| Power Dissipation | ~80 mW at 20 MSPS | ~110 mW at 40 MSPS | ~140 mW at 60 MSPS | Lower power | ~85 mW at 20 MSPS | ~140 mW at 60 MSPS |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C | -40C to +85C | 0C to +70C (commercial) | -40C to +85C | -40C to +85C |
Wichtigste Unterscheidungsmerkmale
- Single-speed-grade 20 MSPS in the family (vs. HI5767/4IAZ (40 MSPS) and HI5767/6IAZ (60 MSPS))
- Internal 2.5 V reference - no external REF IC (vs. AD9051 (requires external reference))
- Industrial -40C to +85C temperature grade (vs. HI5766KCAZ (commercial 0C to +70C))
Designhinweise
Decouple AVDD (pin 4 and pin 21) and DVDD (pin 27) with separate 0.1 uF ceramic + 10 uF tantalum/ceramic pairs. Place the 0.1 uF caps within 2 mm of the supply pins and use a single-point ground for analog and digital returns to avoid digital switching noise coupling into the analog input through the ground plane. Estimated: at 20 MSPS with 5 V analog supply, typical supply current is ~16 mA, giving ~80 mW dissipation. Add 0.1 uF + 10 uF decoupling on DRVDD (pin 17) for the output drivers.
Use a 4-layer PCB with a dedicated ground plane under the HI5767/2IAZ. Route the analog input trace as a 50-ohm controlled-impedance microstrip surrounded by ground on both sides. Keep the input trace short (under 25 mm) and avoid routing near the digital output bus (D0-D9) to minimize digital-to-analog crosstalk. The exposed SSOP leads on the bottom of the package can be soldered to a copper pad for thermal relief at higher sample rates (/4 and /6 grades).
Place the input anti-alias RC filter (typically 50-ohm + 30 pF for 100 MHz bandwidth) within 10 mm of the AIN pin. Drive the analog input with a low-impedance, fast-settling op-amp such as the HA5024, AD8055, or LMH6702; do not drive AIN directly from a high-impedance source because the 5 pF input capacitance will form a low-pass filter and distort high-frequency content. Maintain separate analog and digital ground regions joined at a single point near the ADC's AGND pin.
Common pitfalls: (1) Exceeding the absolute maximum 7 V analog supply - this will permanently damage the part. (2) Driving AIN with a signal that exceeds 0.5 V beyond AVDD or goes below AGND by more than 0.5 V - the input ESD diodes will forward-bias. (3) Using an undersized anti-alias filter that aliases out-of-band noise into the baseband - verify the -3dB point is below (FSAMPLE/2) and the stopband attenuation exceeds the noise floor at 10 bits (~60 dB). (4) Forgetting the internal-reference bypass capacitor on VREF (pin 22) - this degrades SNR noticeably. (5) Routing the CLK signal through a long or impedance-mismatched trace - poor clock edges directly degrade SNR.
Compliance-Informationen
RoHS and lead-free compliance per Renesas product page. AEC-Q100 not applicable - this is an industrial / consumer data converter, not an automotive-qualified part. REACH compliance per Renesas product declaration. Halogen-free status: not explicitly stated in the verified data.
