KSZ9031RNXIA-TR - Gigabit Ethernet PHY RGMII 48-QFN | Microchip
Teilenummer: KSZ9031RNXIA-TR ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $4.05 | $4,05 |
| 10 | $3.62 | $36,20 |
| 100 | $3.21 | $321,00 |
| 500 | $2.95 | $1.475,00 |
| 1.000 | $2.78 | $2.780,00 |
| 3.000 | $2.52 | $7.560,00 |
KSZ9031RNXIA-TR Übersicht
A gigabit Ethernet PHY (Physical Layer device) is the lowest layer of the OSI networking model and is responsible for converting digital data from a MAC controller into analog signals that traverse copper cabling, and vice versa. Modern Gigabit PHYs integrate DSP-based echo and crosstalk cancellers, adaptive equalization, and feed-forward correction to maintain 1000BASE-T link integrity across 100 m of CAT-5e cable. The KSZ9031 family belongs to the broader category of 10/100/1000 Ethernet transceivers, sitting below the MAC and above the magnetics in the typical BOM.
Key features of the KSZ9031RNXIA-TR include: support for RGMII v1.3 and v2.0 (with on-chip delay), 1.8/2.5/3.3V tolerant I/O via separate VDDIO and AVDD rails, integrated termination resistors, LinkMD cable-diagnostics for open/short detection, IEEE 802.3az Energy Efficient Ethernet (EEE), 1588v2 timing support, and four-speed auto-negotiation with HP Auto-MDIX. The device is supplied in a 7x7 mm 48-QFN package that requires only a 25 MHz reference clock.
Architecturally, the KSZ9031 uses a DSP-based receiver with adaptive equalization and baseline wander correction, combined with a class-AB line driver. The internal PHY address, mode, and clock-skew straps are sampled at RESET_N de-assertion through the MODE[3:0] pins, allowing board designs to configure RGMII timing, EEE, and reference-clock mode without external EEPROM in most cases. Management is performed through a standard MDC/MDIO two-wire serial interface (clause 22 and clause 45).
Typical applications include industrial Ethernet switches, automotive infotainment and ADAS camera links, factory automation PLCs, IP set-top boxes, network-attached storage (NAS), and any embedded design that needs a wired 1 Gbit/s uplink to a host processor or switch. The industrial temperature range (-40C to +85C) makes the KSZ9031RNXIA-TR suitable for harsh-environment designs.
When designing with this part, observe the 1.0 V (or 1.2 V) AVDD core supply sequencing relative to the 3.3 V analog rail, and place the 1.0 uF + 0.1 uF decoupling pair as close to each AVDD pin as possible. Connect the central exposed pad (EPAD) to a solid ground pour to meet the 31.6 C/W thermal resistance, and follow Microchip's reference MDI layout in the datasheet to maintain 1000BASE-T return loss. The -TR suffix indicates Tape and Reel packaging for high-volume assembly.
This page synthesizes distributor pricing, same-package drop-in alternatives from the KSZ9031 family, and practical design notes not aggregated in a single location in the manufacturer datasheet. Cross-reference material is drawn from DigiKey, Mouser, LCSC, and Microchip application note AN2918 (KSZ9031RNX to KSZ9131RNX migration guide).
Drop-in-Alternativen für KSZ9031RNXIA-TR – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit KSZ9031RNXIA-TR (gleiche Bauform und Footprint) – abweichend in Package, Data Rate, MAC Interface, Product Type, Operating Temperature.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
KSZ9031RNXCC
✅ Drop-In✓ Auf Lager
$4.05 / Stück
Datenblatt ansehen →KSZ9031RNXIA
✅ Drop-In✓ Auf Lager
$3.27 / Stück
Datenblatt ansehen →KSZ9031RNXCA
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
KSZ9131RNXIA
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
DP83867IRRGZ
✅ Drop-In✓ Auf Lager
$6.88 / Stück
Datenblatt ansehen →KSZ9031RNXIA-TR Technische Daten
| Product Type | Ethernet Transceiver (PHY) |
| Datenrate | 10 Mbps / 100 Mbps / 1000 Mbps |
| Network Standard | 10Base-T, 100Base-TX, 1000Base-T |
| Host Interface | RGMII v1.3 / v2.0 |
| Supply Voltage - Core (AVDD) | 1.0 V (typ) / 1.2 V (alt) |
| Supply Voltage - I/O (VDDIO) | 1.8 V / 2.5 V / 3.3 V |
| Number of Transceivers | 1 |
| Number of Drivers / Receivers | 4 / 4 |
| Cable Type | CAT-5 / CAT-5e UTP |
| Auto-Negotiation | Yes (4-speed with HP Auto-MDIX) |
| Energy Efficient Ethernet | IEEE 802.3az supported |
| 1588v2 Timing | Supported |
| LinkMD Cable Diagnostics | Yes |
| Management Interface | MDC/MDIO (Clause 22 / 45) |
| Gehäuse | 48-pin QFN (7x7 mm) with EPAD |
| Betriebstemperatur | -40C to +85C (Industrial) |
| Montageart | Surface Mount |
| Packaging | Tape and Reel (-TR suffix) |
| RoHS-Status | Compliant |
| Reference Clock | 25 MHz external |
KSZ9031RNXIA-TR Pin-Konfiguration
| Pin 1 | TXRXP_A — Differential transmit/receive pair A (MDI) |
| Pin 2 | TXRXM_A — Differential transmit/receive pair A complement (MDI) |
| Pin 3 | AVDDH — 3.3 V analog high supply |
| Pin 4 | TXRXP_B — Differential transmit/receive pair B (MDI) |
| Pin 5 | TXRXM_B — Differential transmit/receive pair B complement (MDI) |
| Pin 6 | AVDDL — 1.0 V (or 1.2 V) analog low supply |
| Pin 7 | TXRXP_C — Differential transmit/receive pair C (MDI) |
| Pin 8 | TXRXM_C — Differential transmit/receive pair C complement (MDI) |
| Pin 9 | TXRXP_D — Differential transmit/receive pair D (MDI) |
| Pin 10 | TXRXM_D — Differential transmit/receive pair D complement (MDI) |
| Pin 11 | AVDDH — 3.3 V analog high supply |
| Pin 12 | NC — Not connected (per datasheet) |
| Pin 13 | NC — Not connected (per datasheet) |
| Pin 14 | NC — Not connected (per datasheet) |
| Pin 15 | TX_ER / NC — Not used in RGMII mode (per datasheet) |
| Pin 16 | TX_EN / TX_CTL — RGMII transmit control |
| Pin 17 | TXD0 — RGMII transmit data bit 0 |
| Pin 18 | TXD1 — RGMII transmit data bit 1 |
| Pin 19 | TXD2 — RGMII transmit data bit 2 |
| Pin 20 | TXD3 — RGMII transmit data bit 3 |
| Pin 21 | AVDDH — 3.3 V analog high supply |
| Pin 22 | VDDIO — 1.8/2.5/3.3 V I/O supply |
| Pin 23 | TX_CLK — RGMII transmit clock (125 MHz at gigabit) |
| Pin 24 | RX_CLK — RGMII receive clock (125 MHz at gigabit) |
| Pin 25 | RX_DV / RX_CTL — RGMII receive control |
| Pin 26 | RXD0 — RGMII receive data bit 0 |
| Pin 27 | RXD1 — RGMII receive data bit 1 |
| Pin 28 | RXD2 — RGMII receive data bit 2 |
| Pin 29 | RXD3 — RGMII receive data bit 3 |
| Pin 30 | AVDDH — 3.3 V analog high supply |
| Pin 31 | AVDDL — 1.0 V (or 1.2 V) analog low supply |
| Pin 32 | GND — Ground |
| Pin 33 | MDC — Management data clock |
| Pin 34 | MDIO — Management data I/O |
| Pin 35 | INT_N — Interrupt output (active low) |
| Pin 36 | RESET_N — Hardware reset (active low) |
| Pin 37 | CLK25_OUT — 25 MHz reference clock output |
| Pin 38 | CLK25_IN — 25 MHz reference clock input |
| Pin 39 | MODE0 — Configuration strap / mode select 0 |
| Pin 40 | MODE1 — Configuration strap / mode select 1 |
| Pin 41 | MODE2 — Configuration strap / mode select 2 |
| Pin 42 | MODE3 — Configuration strap / mode select 3 |
| Pin 43 | PHYAD0 — PHY address strap 0 |
| Pin 44 | PHYAD1 — PHY address strap 1 |
| Pin 45 | AVDDL — 1.0 V (or 1.2 V) analog low supply |
| Pin 46 | LED0 / SPEED — LED driver 0 (link / activity / speed) |
| Pin 47 | LED1 / LINK — LED driver 1 (link status) |
| Pin 48 | VDDIO — 1.8/2.5/3.3 V I/O supply |
Typische Anwendungen
KSZ9031RNXIA-TR ist geeignet für 6 Anwendungs: Industrial Ethernet Switch, Automotive Infotainment and ADAS Camera Link, Network Attached Storage (NAS) and Routers, IP Set-Top Box and Streaming Device, Factory Automation PLC and Industrial Controller, Embedded Single-Board Computer (SBC) Ethernet Port.
Industrial Ethernet Switch
The KSZ9031RNXIA-TR is well suited as the uplink PHY in a managed industrial Ethernet switch where 1 Gbit/s copper is required to a backplane or fibre media converter. The device's RGMII v1.3/v2.0 interface with on-chip delay lines connects directly to a switch ASIC without external delay buffers, reducing BOM cost and PCB area. The -40C to +85C industrial temperature range and LinkMD cable diagnostics let the switch detect opens/shorts on installation, while 1588v2 timing support enables IEEE 1588 transparent clocks for time-critical automation. The 48-QFN 7x7 mm footprint drops onto a switch mezzanine card with standard magnetics.
Empfohlen
Automotive Infotainment and ADAS Camera Link
For automotive infotainment head units and ADAS camera Ethernet links, the KSZ9031RNXCA variant (pin-compatible) provides 1000BASE-T connectivity for high-resolution camera data. The KSZ9031RNXIA-TR is commonly used in development boards and reference designs that feed raw gigabit video streams to a host SoC over RGMII. Its integrated termination, HP Auto-MDIX, and 1588v2 timestamping support PTP-synchronized multi-camera systems, while the small 48-QFN 7x7 mm package fits behind a display or camera module. LinkMD is used in the assembly line to verify cable harness integrity before vehicle delivery.
Empfohlen
Network Attached Storage (NAS) and Routers
The KSZ9031RNXIA-TR is widely deployed in consumer NAS enclosures and home routers as the 1 Gbit/s WAN/LAN PHY. Its 1.0 V core / 3.3 V I/O supply scheme matches typical SoC reference designs and keeps total board power below 1 W, while the integrated termination resistors eliminate 8 external components compared to discrete PHY solutions. The RGMII interface is the de-facto standard for ARM-based NAS SoCs, and LinkMD cable diagnostics help the host UI display a 'cable problem' message when a CAT-5 link is degraded, simplifying user troubleshooting.
Empfohlen
IP Set-Top Box and Streaming Device
In IP set-top boxes and OTT streaming devices, the KSZ9031RNXIA-TR provides the wired 1 Gbit/s Ethernet connection to a home router, ensuring sufficient bandwidth for 4K HDR video streams. The RGMII interface is widely supported by set-top box SoCs from Broadcom, Realtek, and HiSilicon, and the PHY's 1.0 V AVDD core supply can be derived from a small buck regulator. The small 48-QFN 7x7 mm package fits inside the slim enclosures of modern streaming sticks. IEEE 802.3az EEE reduces standby power when the box is idle, helping meet Energy Star requirements.
Empfohlen
Factory Automation PLC and Industrial Controller
The KSZ9031RNXIA-TR's industrial temperature grade and LinkMD cable diagnostics make it a strong fit for factory automation PLCs and remote I/O racks that require deterministic gigabit Ethernet on the plant floor. Its 1588v2 hardware timestamping at the PHY layer delivers sub-microsecond accuracy for motion-control loops, and the on-chip delay RGMII v2.0 interface avoids PCB-level timing adjustments when paired with industrial SoCs. The exposed pad package dissipates the typical 700 mW PHY power across a copper pour, eliminating the need for an external heatsink in a sealed IP65 enclosure.
Empfohlen
Embedded Single-Board Computer (SBC) Ethernet Port
Single-board computers (SBCs) and industrial gateways commonly integrate the KSZ9031RNXIA-TR as the primary 1 Gbit/s Ethernet port exposed to a Linux or RTOS host processor. The device supports both RGMII and GMII, simplifying connection to a wide range of SoCs including NXP i.MX8, Microchip SAMA7, and TI Sitara families. With a 25 MHz reference clock, integrated termination, and LinkMD diagnostic firmware hooks, the part accelerates Linux bring-up and supports ethtool cable diagnostics commands. The 48-QFN 7x7 mm package fits beneath the standard 25.4 mm RJ-45 footprint with magnetics.
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Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für KSZ9031RNXIA-TR – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | KSZ9031RNXCC | KSZ9031RNXIA | KSZ9031RNXCA | KSZ9131RNXIA | DP83867IRRGZ |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Texas Instruments |
| Package | 48-QFN (7x7 mm) | 48-QFN (7x7 mm) - same | 48-QFN (7x7 mm) - same | 48-QFN (7x7 mm) - same | 48-QFN (7x7 mm) - same | 48-QFN (7x7 mm) - same |
| Data Rate | 10/100/1000 Mbps | 10/100/1000 Mbps | 10/100/1000 Mbps | 10/100/1000 Mbps | 10/100/1000 Mbps + 100BASE-T1 | 10/100/1000 Mbps + SGMII |
| Host Interface | RGMII v1.3/v2.0 | RGMII v1.3/v2.0 | RGMII v1.3/v2.0 | RGMII v1.3/v2.0 | RGMII v1.3/v2.0 | RGMII/SGMII |
| Operating Temperature | -40C to +85C (Industrial) | 0C to +70C (Commercial) | -40C to +85C (Industrial) | -40C to +85C (AEC-Q100 Automotive) | -40C to +85C (Industrial) | -40C to +85C (Industrial) |
| AEC-Q100 Qualified | No (industrial grade) | No | No | Yes | No | No |
| 1588v2 Timestamping | Yes | Yes | Yes | Yes | Yes (improved) | Yes |
| Energy Efficient Ethernet (802.3az) | Yes | Yes | Yes | Yes | Yes | Yes |
Wichtigste Unterscheidungsmerkmale
- Industrial temperature grade with -40C to +85C support (vs. KSZ9031RNXCC)
- Tape and Reel packaging for high-volume SMT assembly (vs. KSZ9031RNXIA (tray))
- LinkMD cable diagnostics for field troubleshooting (vs. DP83867IRRGZ)
Designhinweise
The KSZ9031RNXIA-TR requires two separate analog supplies: AVDDH at 3.3 V for the MDI line driver, and AVDDL at 1.0 V (or 1.2 V) for the digital core. Power sequencing per the datasheet requires AVDDL to come up before AVDDH to prevent latch-up. Place a 1.0 uF X5R ceramic plus a 0.1 uF X7R ceramic within 3 mm of each AVDD pin. A ferrite bead on the AVDDH supply from the main 3.3 V rail reduces conducted noise coupling from upstream DC-DC converters. VDDIO can be tied to 1.8 V, 2.5 V, or 3.3 V to match the host SoC I/O bank; this supply must ramp simultaneously with the host SoC to avoid bus contention during reset.
Estimated: at full gigabit activity with all 4 MDI pairs switching, the KSZ9031RNXIA-TR dissipates approximately 700 mW worst case. With a 31.6 C/W theta_JA on a JEDEC 4-layer test board, this yields a junction temperature rise of 22C above ambient - well within the 125C junction maximum at 85C ambient. However, the central exposed pad (EPAD) MUST be soldered to a continuous ground pour with at least 4 thermal vias (0.3 mm drill, 0.5 mm pitch) under the package to achieve the datasheet thermal resistance. Without proper EPAD soldering, junction temperature can exceed 100C and trigger thermal shutdown during sustained gigabit traffic.
Follow the manufacturer's reference MDI layout in the datasheet: route the four 1000BASE-T differential pairs (MDI_A through MDI_D) with 100 ohm differential impedance, length-matched within 50 mils (1.27 mm) on each pair, and length-matched between pairs within 200 mils (5.08 mm). Keep the MDI traces away from switching power converter inductors and clock signals. Place the 49.9 ohm 1% termination resistors within 5 mm of the RJ-45 magnetics. The 25 MHz crystal or oscillator should be placed within 5 mm of the CLK25_IN pin, with a guard ring tied to ground around the crystal traces to prevent radiated noise coupling.
Three pitfalls to avoid: (1) Do not connect the central EPAD to a small isolated ground island - it must join the main ground pour to dissipate heat; (2) Do not omit the 25 MHz clock source - the KSZ9031 will not link up without a valid CLK25_IN; (3) Do not set RGMII clock skew in the host SoC AND in the KSZ9031 strap simultaneously - this causes double-delay and link failures. Use the on-chip PHY delay (RGMII v2.0 mode) and disable the SoC-side delay. Reset must be held low for at least 100 us after all supplies are stable per the datasheet.
Compliance-Informationen
RoHS compliant per Microchip product page. Industrial temperature grade, not AEC-Q100 automotive qualified - select KSZ9031RNXCA for automotive designs. Halogen-free per Microchip Material Declaration.
