LMG3105R017 - 100V 1.7mΩ GaN FET Power Stage | Texas Instruments
Teilenummer: LMG3105R017 ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $5.85 | $5,85 |
| 10 | $5.26 | $52,60 |
| 100 | $4.67 | $467,00 |
| 500 | $4.2 | $2.100,00 |
| 1.000 | $3.74 | $3.740,00 |
LMG3105R017 Übersicht
What is a GaN power stage? A GaN power stage is a power-management IC that co-integrates a gallium-nitride enhancement-mode transistor and its gate driver inside one package. Compared to silicon MOSFETs, GaN FETs offer lower on-resistance per die area, near-zero reverse-recovery charge, and faster switching edges. A power stage (versus a bare die) brings the driver adjacent to the FET, which minimizes the gate-loop inductance and lets the device switch at high dV/dt while remaining rugged. GaN power stages sit in the power-conversion signal chain as the final switching element in buck, boost, half-bridge, and full-bridge converters used in power management.
Key features include a 1.7mΩ typical on-resistance, 100V continuous drain-source voltage (120V pulsed), 6.7ns typical propagation delay, TTL-compatible 3.3V/5V logic inputs, integrated bootstrap diode, and built-in under-voltage lockout (UVLO), over-current protection (OCP), and thermal shutdown. The integrated smart-switching feature tailors dead-time control for maximum efficiency in half-bridge and synchronous-rectifier topologies.
Technically, the LMG3105R017 uses TI's GaN-on-Si process with a high-side level shifter, allowing direct PWM input from a controller. The bond-wire-free package minimizes parasitic inductance in the switching loop, enabling MHz-class switching frequencies with low EMI. The integrated gate driver is matched to the GaN FET threshold, providing tightly controlled dv/dt immunity and eliminating the need for an external gate resistor.
Typical applications include 48V telecom and server point-of-load converters, industrial motor drives, solar micro-inverters, Class-D audio amplifiers, and high-frequency DC-DC brick replacements where efficiency and power density matter. The low Rds(on) of 1.7mΩ minimizes conduction loss even at high current.
Design consideration: route the high-side bootstrap capacitor directly between the BST and SW pins with minimum loop area to avoid noise-induced false-triggering of the high-side driver. Place a 0.1µF X7R ceramic bypass capacitor as close as possible to the VCC pin.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in-Alternativen für LMG3105R017 – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
LMG3100R017VBER
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
LMG3105R044
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
LMG3105R017VBER
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
EPC2216
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
LMG3105R017 Grenzwerte & elektrische Eigenschaften
| Drain-Source Voltage (Continuous) | 100V |
| Drain-Source Voltage (Pulsed) | 120V |
| On-Resistance Rds(on) | 1.7 mΩ (typical) |
| Gepulster Drain-Strom | 126 A |
| Technology | GaN FET with integrated driver |
| Input Logic Compatibility | 3.3V / 5V TTL |
| Propagation Delay (Typical) | 6.7 ns |
| Bootstrap Circuit | Integrated high-side level shifter and bootstrap diode |
| Protection Features | UVLO, OCP, thermal shutdown |
| Smart Switching | Yes (integrated dead-time control) |
| Gehäuse | 15-VQFN-FCRLF (6.5 mm × 4 mm × 0.89 mm) |
| Montageart | Surface Mount |
| RoHS-Status | Compliant |
| Lead-Free | Yes |
LMG3105R017 Pin-Konfiguration
| Pin 1 | PWMH — High-side PWM input (TTL logic, 3.3V/5V compatible) |
| Pin 2 | PWML — Low-side PWM input (TTL logic, 3.3V/5V compatible) |
| Pin 3 | VCC — Driver supply voltage (typically 5V or 12V) |
| Pin 4 | BST — Bootstrap capacitor connection for high-side driver supply |
| Pin 5 | SW — Switching node (half-bridge output) |
| Pin 6 | NC — Not connected (per datasheet) |
| Pin 7 | NC — Not connected (per datasheet) |
| Pin 8 | VDD — Logic supply voltage (3.3V/5V) |
| Pin 9 | GND — Power ground (driver section) |
| Pin 10 | GND — Power ground (GaN FET source) |
| Pin 11 | GND — Power ground (GaN FET source) |
| Pin 12 | VIN — Drain of GaN FET (high-voltage input) |
| Pin 13 | VIN — Drain of GaN FET (high-voltage input) |
| Pin 14 | NC — Not connected (per datasheet) |
| Pin 15 | NC — Not connected (per datasheet) |
| Pin PAD | EP — Exposed thermal pad - connect to GND for cooling |
Sicherer Arbeitsbereich
Typische Anwendungen
LMG3105R017 ist geeignet für 6 Anwendungs: 48V Telecom Point-of-Load Converter, Industrial Motor Drive Half-Bridge, Solar Micro-Inverter Power Stage, Class-D Audio Amplifier Output Stage, High-Density Server DC-DC Brick, Electric Vehicle Auxiliary DC-DC Converter.
48V Telecom Point-of-Load Converter
The LMG3105R017 is well matched to 48V telecom point-of-load converters thanks to its 100V continuous VDS rating, which exceeds 48V nominal plus transient overshoot, and its 1.7mΩ Rds(on) which keeps conduction loss low at tens of amps of load current. According to TI's GaN reference designs, the LMG3105R017 enables >96% peak efficiency in 48V-to-PoL buck topologies. The integrated gate driver eliminates an external driver IC and minimizes gate-loop inductance, allowing MHz-class switching that shrinks output inductors and capacitors dramatically. Placed as the high-side FET with a companion low-side FET (or another LMG3100R017), the LMG3105R017 simplifies layout, reduces BOM count, and enables power densities well above silicon MOSFET solutions.
Empfohlen
Industrial Motor Drive Half-Bridge
In industrial motor drives, the LMG3105R017 forms one half-bridge leg with its integrated high-side level shifter and bootstrap diode, eliminating the need for external discrete driver components. The 100V/120V pulsed rating covers 24V and 48V DC-bus systems with substantial margin, and the 126A pulsed capability handles the high-current inrush of brushed and brushless DC motor phases. Per TI's datasheet, the smart-switching dead-time control reduces shoot-through risk at high dV/dt, which is critical in PWM-driven motor inverters running at 50-200kHz. Compared to silicon IGBTs, the LMG3105R017 switches several times faster, reducing switching loss and allowing smaller heatsinks.
Empfohlen
Solar Micro-Inverter Power Stage
The LMG3105R017 suits solar micro-inverter applications where high efficiency across a wide load range is essential to maximize energy harvest. Its 1.7mΩ Rds(on) minimizes conduction loss during peak power transfer, while the integrated smart-switching feature tailors dead-time for the high-frequency transformer-isolated DC-DC stage typical of micro-inverters. The 100V rating fits 24V-48V PV string architectures with sufficient margin. According to TI's GaN solar design resources, the LMG3105R017 achieves higher conversion efficiency than silicon MOSFET alternatives at the same frequency, allowing smaller magnetics and lower system cost per watt.
Empfohlen
Class-D Audio Amplifier Output Stage
Audio Class-D amplifiers benefit from the LMG3105R017's low Rds(on) and fast switching edge rates, which minimize dead-time distortion and improve THD+N performance. The 100V rating supports high-power automotive and professional audio amplifiers (e.g., 50V-70V rails). According to TI's audio GaN reference designs, the LMG3105R017's bond-wire-free package reduces output-loop inductance, lowering voltage overshoot and EMI emissions at the switching node, which is critical for passing FCC/CE compliance. The integrated protection (UVLO, OCP, thermal shutdown) enhances reliability for high-power continuous-output audio applications.
Empfohlen
High-Density Server DC-DC Brick
The LMG3105R017 enables high-density 48V-to-PoL server DC-DC bricks by supporting switching frequencies in the 1-2 MHz range with low switching loss, allowing dramatic reductions in output inductor and capacitor volume. Its 1.7mΩ Rds(on) keeps conduction loss low at 30-60A continuous loads typical of server rails. According to TI's GaN server power-supply design guides, the LMG3105R017 enables 50-60% smaller power-stage area compared to equivalent silicon MOSFET designs, helping meet Open Compute Project (OCP) and similar density standards.
Empfohlen
Electric Vehicle Auxiliary DC-DC Converter
Auxiliary 48V-to-12V DC-DC converters in mild-hybrid electric vehicles benefit from the LMG3105R017's 100V rating, which covers 48V automotive rails with substantial transient margin, and its 1.7mΩ Rds(on) for high efficiency. The integrated gate driver reduces PCB area and improves reliability by eliminating external driver ICs and their associated gate-loop inductance. Per TI's automotive GaN resources, the LMG3105R017 enables >95% efficiency at 2 kW output, helping reduce CO2 emissions by improving electrical-system efficiency. The integrated OCP and thermal-shutdown protection enhance automotive-grade robustness.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für LMG3105R017 – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | LMG3100R017VBER | LMG3105R044 | LMG3105R017VBER | EPC2216 |
|---|---|---|---|---|---|
| Package | 15-VQFN-FCRLF (6.5x4 mm) | 15-VQFN-FCRLF (6.5x4 mm) - same footprint | 15-VQFN-FCRLF (6.5x4 mm) - same footprint | 15-VQFN-FCRLF (6.5x4 mm) - same footprint | QFN-style BGA (4.6x2.1 mm) - different footprint |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | EPC |
| On-Resistance Rds(on) | 1.7 mΩ | 1.7 mΩ - identical | 4.4 mΩ - higher (slower) | 1.7 mΩ - identical | 1.7 mΩ - identical |
| Continuous VDS Rating | 100V | 100V - same | 100V - same | 100V - same | 100V - same |
| Driver Topology | Integrated half-bridge (high+low side) | Integrated low-side only | Integrated half-bridge (high+low side) | Integrated half-bridge (high+low side) | Bare die (no integrated driver) |
Wichtigste Unterscheidungsmerkmale
- Bond-wire-free package minimizes switching-loop inductance (vs. LMG3100R017VBER)
- Lower Rds(on) for higher-current applications (vs. LMG3105R044)
- Integrated smart-switching dead-time control (vs. EPC2216)
Designhinweise
Layout is paramount when using the LMG3105R017 in a half-bridge configuration. Place the high-side bootstrap capacitor (typically 0.1µF to 1µF X7R ceramic) as close as possible to the BST and SW pins, with the loop area minimized to below 1 cm². The high-frequency switching node (SW) should be routed away from sensitive analog traces to avoid noise injection. Use a 4-layer PCB with a dedicated ground plane directly under the device's exposed pad (EP) for thermal dissipation.
Estimated: at 30A continuous current and 1.7mΩ Rds(on), the LMG3105R017 dissipates approximately P = I² × R = 30² × 0.0017 ≈ 1.53W. With proper PCB layout using the exposed thermal pad soldered to a 1 oz copper pour of at least 1 square inch, junction temperature rise should remain below 30-40°C above ambient. For continuous loads above 40A, active cooling or a heatsink attached to the package top should be considered.
The LMG3105R017 requires a stable VCC supply (typically 5V or 12V) for the internal gate driver. Place a 1µF X7R ceramic bypass capacitor directly at the VCC pin with shortest possible trace length. A separate 0.1µF capacitor in parallel is recommended to bypass high-frequency noise. UVLO on VCC will shut down the driver if VCC falls below its threshold (typically 4.5V); ensure your auxiliary supply has sufficient headroom under all load transients.
Do not exceed 100V continuous drain-source voltage - the GaN FET has no avalanche rating and can be permanently damaged by over-voltage events. Ensure the high-side bootstrap refresh circuit functions correctly at all duty cycles (including 100% duty cycle for some controllers); a missing bootstrap refresh will cause the high-side FET to lose gate drive and fail. Always sequence the LMG3105R017's VCC supply before applying the high-voltage VIN to prevent inrush currents through an unpowered gate driver.
The PWMH and PWML inputs are TTL-compatible and accept 3.3V or 5V logic regardless of VCC voltage. Route PWM traces as 50Ω transmission lines if longer than 25 mm to prevent ringing. Place a 10kΩ pull-down resistor on each PWM input to ensure the FET stays off if the controller is disconnected during debugging. The smart-switching dead-time control is automatic, but ensure PWM rise/fall times are below 20ns for optimal dead-time accuracy.
Compliance-Informationen
RoHS and lead-free compliance per TI product page. AEC-Q100 status not explicitly listed in provided data; not_applicable is conservative. Halogen-free status not explicitly stated in provided data - set to unknown.
