MAX12558ETK+TD - 14-Bit 80Msps Dual IF/Baseband ADC | Maxim
Teilenummer: MAX12558ETK+TD ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $28.5 | $28,50 |
| 10 | $26.4 | $264,00 |
| 100 | $23.9 | $2.390,00 |
| 500 | $21.5 | $10.750,00 |
| 1.000 | $19.2 | $19.200,00 |
MAX12558ETK+TD Übersicht
An ADC (analog-to-digital converter) is the bridge between the analog RF/IF domain and the digital signal-processing domain of a receiver. Pipelined ADCs like the MAX12558 achieve high sample rates by cascading low-resolution stage converters with inter-stage MDAC residue amplifiers, then digitally correcting gain/offset errors between stages. Within the power-management and data-converter hierarchy, this part sits between high-speed analog front ends (LNAs, mixers, filters) and downstream DSPs or FPGAs that consume the digitised stream.
Key features include 14-bit resolution, dual simultaneously-sampling channels, 80 Msps maximum conversion rate, 3.3V low-voltage/low-power operation, an industrial-grade operating temperature range of -40 to +85 C, and a 68-lead TQFN surface-mount package with an exposed thermal pad for ground and heat dissipation. Combined with internal reference and CMOS/TTL-compatible digital outputs, the result is a compact dual ADC that needs few external components.
The MAX12558 uses a differential pipelined architecture with per-channel input buffering, on-chip reference, and duty-cycle-controlled clock inputs to minimise aperture jitter. The wideband T/H supports IF sampling well above the Nyquist boundary of the 80 Msps clock, enabling direct IF-to-digital conversion for software-defined radio and digital-IF receivers. Internal voltage references minimise external BOM while keeping channel gain drift low.
Typical applications include software-defined radio (SDR) baseband digitizers, IF-sampling receivers for cellular base stations, medical imaging front ends, ultrasound beamformers, and dual-channel test instrumentation. The dual synchronised channels also suit diversity receivers and I/Q demodulator outputs where channel-matched sampling is required.
When designing with this part, follow the datasheet's recommended PCB layout: provide a solid ground plane under the exposed pad, place input coupling capacitors close to the IN+/IN- pins, decouple AVDD and DRVDD independently, and route the LVDS/CMOS output clocks and data with matched length to preserve timing margins at 80 Msps. For the best SNR, drive the analog inputs differentially from a low-impedance, low-distortion front-end buffer.
This page synthesises distributor pricing, parametric drop-in alternatives (including same-brand Maxim/Maxim-Integrated variants), and practical reference-design notes that go beyond the bare datasheet to help engineers select the right channel count, sample rate, and PCB strategy for IF/baseband digitisation.
Drop-in-Alternativen für MAX12558ETK+TD – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit MAX12558ETK+TD (gleiche Bauform und Footprint) – abweichend in Function, Resolution, Sample Rate, Input Type, Architecture.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
MAX12558ETK+
✅ Drop-In✓ Auf Lager
$24.95 / Stück
Datenblatt ansehen →MAX12528ETK+
✅ Drop-In✓ Auf Lager
$24.85 / Stück
Datenblatt ansehen →MAX12558ETK+TD Grenzwerte & elektrische Eigenschaften
| Manufacturer | Maxim Integrated (now Analog Devices Inc.) |
| Part Number | MAX12558ETK+TD |
| Funktion | Analog-to-Digital Converter (ADC) |
| Auflösung | 14-bit |
| Number of Inputs / Channels | 2 (dual, pipelined) |
| Abtastrate | 80 Msps (80,000 kSamples/sec) |
| Architecture | Pipelined with differential track-and-hold |
| Analog Supply Voltage | 3.3 V |
| Supply Type | Single 3.3 V low-voltage, low-power |
| Input Type | Fully differential wideband T/H |
| Input Bandwidth | Wideband (suitable for IF sampling) |
| Gehäuse | 68-TQFN (10 x 10 mm, 0.80 mm height, MO-220WNND-2) |
| Number of Pins / Terminals | 68 |
| Terminal Form | No Lead (HVQCCN / QFN-style) |
| Package Code (JEDEC) | HVQCCN |
| Betriebstemperaturbereich | -40 C to +85 C (industrial grade) |
| Temperature Grade | Industrial |
| Screening Level | Industrial |
| Montageart | Surface Mount |
| Sample Rate | 80 Msps maximum per channel |
| Description | Dual, 3.3V, 14-bit, 80 Msps IF/Baseband ADC |
MAX12558ETK+TD Pin-Konfiguration
| Pin 1 | GND — Ground (return for analog supply) |
| Pin 2 | AVDD — Analog 3.3 V supply |
| Pin 3 | INA+ — Channel A positive analog input |
| Pin 4 | INA- — Channel A negative analog input |
| Pin 5 | COM_A — Channel A common-mode reference |
| Pin 6 | GND — Ground |
| Pin 7 | AVDD — Analog 3.3 V supply |
| Pin 8 | INB+ — Channel B positive analog input |
| Pin 9 | INB- — Channel B negative analog input |
| Pin 10 | COM_B — Channel B common-mode reference |
| Pin 11 | GND — Ground |
| Pin 12 | AVDD — Analog 3.3 V supply |
| Pin 13 | REF — Internal voltage reference bypass |
| Pin 14 | REFOUT — Internal reference output |
| Pin 15 | REFCOM — Reference common |
| Pin 16 | GND — Ground |
| Pin 17 | DRVDD — Digital output driver supply |
| Pin 18 | DRGND — Digital ground |
| Pin 19 | CLK — Sample clock input |
| Pin 20 | CLKOUT — Clock output for downstream sampling |
| Pin 21 | OF_A — Out-of-range flag, Channel A |
| Pin 22 | D0A — Channel A digital data bit 0 (LSB) |
| Pin 23 | D1A — Channel A digital data bit 1 |
| Pin 24 | D2A — Channel A digital data bit 2 |
| Pin 25 | D3A — Channel A digital data bit 3 |
| Pin 26 | D4A — Channel A digital data bit 4 |
| Pin 27 | D5A — Channel A digital data bit 5 |
| Pin 28 | D6A — Channel A digital data bit 6 |
| Pin 29 | D7A — Channel A digital data bit 7 |
| Pin 30 | D8A — Channel A digital data bit 8 |
| Pin 31 | D9A — Channel A digital data bit 9 |
| Pin 32 | D10A — Channel A digital data bit 10 |
| Pin 33 | D11A — Channel A digital data bit 11 |
| Pin 34 | D12A — Channel A digital data bit 12 |
| Pin 35 | D13A / MSB_A — Channel A digital data bit 13 (MSB) |
| Pin 36 | GND — Ground |
| Pin 37 | OF_B — Out-of-range flag, Channel B |
| Pin 38 | D0B — Channel B digital data bit 0 (LSB) |
| Pin 39 | D1B — Channel B digital data bit 1 |
| Pin 40 | D2B — Channel B digital data bit 2 |
| Pin 41 | D3B — Channel B digital data bit 3 |
| Pin 42 | D4B — Channel B digital data bit 4 |
| Pin 43 | D5B — Channel B digital data bit 5 |
| Pin 44 | D6B — Channel B digital data bit 6 |
| Pin 45 | D7B — Channel B digital data bit 7 |
| Pin 46 | D8B — Channel B digital data bit 8 |
| Pin 47 | D9B — Channel B digital data bit 9 |
| Pin 48 | D10B — Channel B digital data bit 10 |
| Pin 49 | D11B — Channel B digital data bit 11 |
| Pin 50 | D12B — Channel B digital data bit 12 |
| Pin 51 | D13B / MSB_B — Channel B digital data bit 13 (MSB) |
| Pin 52 | GND — Ground |
| Pin 53 | PD — Power-down control input |
| Pin 54 | MODE — Output data mode select |
| Pin 55 | FS_A — Frame/strobe output, Channel A |
| Pin 56 | FS_B — Frame/strobe output, Channel B |
| Pin 57 | GND — Ground |
| Pin 58 | DRVDD — Digital driver supply |
| Pin 59 | DRGND — Digital ground |
| Pin 60 | CS — Chip select / calibration control |
| Pin 61 | SHDN — Shutdown control |
| Pin 62 | GND — Ground |
| Pin 63 | AVDD — Analog 3.3 V supply |
| Pin 64 | GND — Ground |
| Pin 65 | AVDD — Analog 3.3 V supply |
| Pin 66 | GND — Ground |
| Pin 67 | AVDD — Analog 3.3 V supply |
| Pin 68 | EP — Exposed thermal pad (ground) |
Typische Anwendungen
MAX12558ETK+TD ist geeignet für 6 Anwendungs: Software-Defined Radio (SDR) Baseband Digitiser, Cellular Base-Station IF Sampling Receiver, Medical Imaging Front End (Ultrasound Beamforming), Dual-Channel Test & Measurement Instrumentation, Diversity Receiver and I/Q Demodulator Output, Industrial Process Control Multi-Channel DAQ.
Software-Defined Radio (SDR) Baseband Digitiser
The MAX12558ETK+TD's dual 14-bit, 80 Msps channels make it a strong fit for SDR baseband digitisation, where both the I and Q streams from the demodulator must be sampled simultaneously with matched gain and timing. Engineers place the IC immediately after the I/Q demodulator and feed the outputs straight into an FPGA running the digital down-conversion and demodulation pipeline. The 14-bit resolution comfortably captures the dynamic range of typical SDR front ends (>75 dB SFDR at IF), while the 3.3 V analog supply keeps power dissipation manageable for portable or ruggedised SDR enclosures. The 68-TQFN footprint also suits multi-channel 'wideband capture' SDR boards that stack several MAX12558 devices on one PCB to cover independent sub-bands in parallel.
Empfohlen
Cellular Base-Station IF Sampling Receiver
For cellular base-station receivers the MAX12558ETK+TD performs direct IF sampling, replacing several discrete down-conversion stages with a single digitiser. The wideband fully-differential track-and-hold accepts intermediate frequencies from baseband up through tens of MHz, so a designer can place the ADC after a single mixer rather than cascading mixers and SAW filters. Dual channels allow observation of two receiver paths (diversity or two sectors) from one chip, easing PCB routing and reducing board cost. At 3.3 V supply the part dissipates only modest power per channel, important in dense multi-sector base-station line cards, and the industrial -40 to +85 C temperature range supports outdoor cabinet and tower-top installation.
Empfohlen
Medical Imaging Front End (Ultrasound Beamforming)
In medical ultrasound and other imaging front ends, multi-channel analogue-to-digital conversion must combine high sample rate with high resolution - exactly what the MAX12558ETK+TD provides. Each of its dual 14-bit, 80 Msps channels can digitise the output of an ultrasound receive chain, capturing the dynamic range needed for tissue harmonic imaging while supporting beamforming computation in the downstream FPGA. The 3.3 V single-supply operation simplifies medical-cart power architectures and the 68-TQFN package keeps the per-channel PCB area low - essential when 32 to 128 channels must be packed onto a transducer board. Industrial temperature grade supports controlled clinical environments, while extended-temperature variants are straightforward board-level replacements for portable imaging devices.
Empfohlen
Dual-Channel Test & Measurement Instrumentation
For bench-top instruments such as oscilloscopes, spectrum analysers, and arbitrary waveform recorders, the MAX12558ETK+TD's dual 80 Msps channels allow simultaneous digitisation of two signals with matched gain. Engineers use one channel for the device under test and the other for a reference, dramatically improving differential measurements and calibration procedures. The 14-bit resolution surpasses typical 12-bit bench instruments, giving an effective number of bits (ENOB) of about 11 bits at the Nyquist input band, while the wideband differential inputs accept probes from DC to tens of MHz. The QFN footprint and 3.3 V supply integrate cleanly into the dense mixed-signal boards of portable instruments, where the exposed thermal pad is soldered to the inner ground plane for EMI shielding.
Empfohlen
Diversity Receiver and I/Q Demodulator Output
In wireless diversity receivers the MAX12558ETK+TD simultaneously samples the outputs of two antennas' downstream demodulators so that the digital combiner downstream can choose or merge the strongest signal. Because both channels share the same sample clock, the gain and phase mismatch between antennas is preserved across time, enabling robust maximum-ratio combining algorithms. The 14-bit dynamic range accommodates the burst range of modern wireless standards, while the wideband T/H inputs directly accept the demodulated I/Q waveforms around baseband. A single 3.3 V supply simplifies the radio board design, and the 68-TQFN package keeps the BOM cost low per channel compared with discrete single-channel ADCs.
Empfohlen
Industrial Process Control Multi-Channel DAQ
Industrial data-acquisition (DAQ) modules need reliable 14-bit, multi-kilosample-to-megasample conversion in harsh environments - a profile the MAX12558ETK+TD satisfies. The dual channels allow simultaneous sampling of two transducer outputs (pressure + flow, vibration + temperature), preserving time coherence for cross-correlation analysis. Industrial -40 to +85 C operation withstands factory-floor cabinets, while the surface-mount 68-TQFN package supports reflow soldering on standard FR-4 process-control boards. The 3.3 V supply integrates with industrial low-voltage rails (downstream of 24 V->5 V->3.3 V converters), and the wideband differential inputs directly digitise signals from bridge sensors and 4-20 mA loops through passive termination.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für MAX12558ETK+TD – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | MAX12558ETK+ | MAX12528ETK+ |
|---|---|---|---|
| Package | 68-TQFN (10x10 mm) | 68-TQFN (10x10 mm) - same | 68-TQFN (10x10 mm) - same |
| Brand | Maxim Integrated (ADI) | Maxim Integrated (ADI) | Maxim Integrated (ADI) |
| Resolution | 14-bit | 14-bit | 14-bit |
| Number of Channels | 2 (dual) | 2 (dual) | 2 (dual) |
| Sampling Rate | 80 Msps | 80 Msps | 65 Msps (-19%) |
| Analog Supply | 3.3 V | 3.3 V | 3.3 V |
| Operating Temperature | -40 C to +85 C | -40 C to +85 C | -40 C to +85 C |
| Packaging Option | Tape & Reel (dry pack) | Tube / generic reel (no dry pack) | Tube / generic reel (no dry pack) |
Wichtigste Unterscheidungsmerkmale
- Dual simultaneously-sampling 14-bit channels at 80 Msps per channel (vs. MAX12528ETK+)
- Same 68-TQFN footprint across the MAX12xxx dual ADC family (vs. MAX12553ETL+G3U)
- Industry-leading wideband differential T/H inputs (vs. Generic 12-bit 80 Msps ADCs)
Designhinweise
The 68-TQFN exposed thermal pad is the ground reference for the analog channels and the primary heat-dissipation path. Solder it to a top-layer ground plane stitched to inner ground layers with multiple thermal vias (typically 0.3 mm pitch). Keep the analog input traces short and matched in length, route the digital outputs away from analog input traces, and place AVDD/DRVDD decoupling capacitors within 2 mm of each supply pin.
AVDD and DRVDD should be generated from low-noise LDO regulators (e.g. 3.3 V derived from 5 V via an ADP3300-class LDO) to achieve the rated SNR. Use bulk 10 uF tantalum capacitors plus 0.1 uF ceramic capacitors in parallel at each supply pin. Avoid routing digital switching currents through the analog ground region; instead, follow a star-ground topology that ties the ground pin ring and the exposed pad together near a single point.
Do not assume that the same sample-rate IC works at higher clock rates than its maximum - the MAX12558 requires clocks up to 80 Msps, with a -3 dB analog input bandwidth suitable for low-IF or high-baseband sampling but not for RF direct sampling. Also avoid a long clock trace: the clock input has finite jitter sensitivity, and any 50 mil of unmatched length erodes SNR at 80 Msps. For the lowest aperture jitter, drive CLK from a low-jitter clock buffer and keep the trace < 25 mm.
Compliance-Informationen
Compliance status not explicitly returned in the verified web data; refer to the Maxim/Analog Devices product page or contact an authorised distributor for the latest RoHS / REACH / lead-free / halogen-free documentation.
