TPS3808G18DRVR - 1.8V Voltage Supervisor, 2.4µA Iq, WSON-6 | TI
Teilenummer: TPS3808G18DRVR ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $1.45 | $1,45 |
| 10 | $1.28 | $12,80 |
| 100 | $1.05 | $105,00 |
| 500 | $0.89 | $445,00 |
| 1.000 | $0.74 | $740,00 |
| 3.000 | $0.62 | $1.860,00 |
TPS3808G18DRVR Übersicht
A voltage supervisor (also called a reset IC, voltage monitor, or power-on reset circuit) is a power management IC that observes a system supply rail and asserts a reset signal whenever the rail falls outside its valid operating window. Supervisors sit hierarchically above DC-DC converters and LDOs in the power tree: they do not generate power themselves but rather guarantee that downstream logic (microcontrollers, FPGAs, ASICs, DSPs) only starts up after the rail has stabilized, and re-enters reset whenever the rail dips below a safe threshold. The TPS3808 family belongs to the supervisor category within TI's broader Power Management IC portfolio.
Key features of the TPS3808G18DRVR include a typical quiescent current of 2.4 µA (critical for battery-powered designs), 20 ms minimum reset delay (factory-trimmed, capacitor-adjustable up to 10 s), open-drain RESET output for wired-OR with other rails, an active-low manual reset input, and a wide operating temperature range of -40°C to +125°C. The 2x2 mm WSON-6 footprint occupies roughly 4 mm² of PCB area, suiting it for space-constrained wearables, IoT endpoints, and sensor nodes.
Architecturally, the TPS3808 combines a precision bandgap reference, a comparator chain, a programmable delay timer, and an open-drain NMOS output stage. The factory-trimmed 1.8V sense threshold means no external resistor divider is required, reducing BOM count and eliminating trim errors. The CT pin accepts an external capacitor to set tD = 2.39 × 10^5 × CCT (seconds), giving the designer flexible power-on reset timing.
Typical applications include 1.8V core rail monitoring in IoT sensors and wearables, FPGA/MCU brown-out protection in battery-powered systems, point-of-load monitoring in multi-rail designs, and industrial sensor nodes that require deterministic startup. The 2.4 µA Iq makes the part well suited to coin-cell and lithium-thionyl-chloride powered devices that must remain in standby for years.
When designing with this part, place the CT capacitor as close as possible to the CT pin to minimize leakage paths and to ensure accurate delay timing. Pull-up resistance on the open-drain RESET output must respect the V_PULLUP rail used by the downstream logic; tying RESET to a different rail than VDD is a supported use case.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet - giving engineers a single decision-ready reference.
Drop-in-Alternativen für TPS3808G18DRVR – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
TPS3808G18DRVT
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
TPS3808G25DRVR
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
TPS3808G33DRVR
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
TPS3808G01DRVR
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
TPS3808G18DRVR Technische Daten
| Funktion | Voltage Supervisor / Reset IC |
| Sense Threshold (Nominal) | 1.8 V |
| Threshold Accuracy | 0.5% typical |
| Monitored Voltage Range | 0.4 V to 5.0 V (family supports) |
| Supply Voltage (VDD) | 1.7 V to 6.5 V |
| Quiescent Current (Iq) | 2.4 µA typical |
| Reset Output Type | Open-Drain / Open-Collector |
| Manual Reset (MR) Input | Yes, active-low |
| Reset Delay Time | Adjustable via CT cap, up to 10 s; 20 ms minimum |
| Betriebstemperaturbereich | -40°C to +125°C |
| Gehäuse | 6-pin WSON (DRV), 2x2 mm |
| Montageart | Surface Mount |
| MSL-Level | 1 (per TI packaging info) |
| RoHS-Status | Compliant |
| Lead-Free / Halogen-Free | Yes / Yes |
TPS3808G18DRVR Pin-Konfiguration
| Pin 1 | SENSE — Voltage sense input; RESET asserts when this drops below 1.8 V threshold |
| Pin 2 | GND — Ground reference |
| Pin 3 | MR — Manual reset input (active low); internal pull-up |
| Pin 4 | CT — Reset delay programming capacitor; tD = 2.39e5 × CCT |
| Pin 5 | RESET — Open-drain reset output; asserted low on undervoltage or MR |
| Pin 6 | VDD — Supply voltage; 1.7 V to 6.5 V operating range |
Typische Anwendungen
TPS3808G18DRVR ist geeignet für 6 Anwendungs: 1.8 V Core Rail Monitoring for IoT Wearables, FPGA/MCU Brown-Out Protection, Battery-Powered Industrial Sensor Nodes, Multi-Rail Power-Up Sequencing, Point-of-Load Monitoring for PoL Converters, Medical Wearable Patch Devices.
1.8 V Core Rail Monitoring for IoT Wearables
The TPS3808G18DRVR monitors the 1.8 V core rail of low-power IoT wearables and sensor nodes where every microampere of standby current matters. Its 2.4 µA typical quiescent current adds only 1-2% overhead to a typical 200 µA MCU standby budget, while the factory-trimmed 1.8 V threshold with 0.5% accuracy eliminates the resistor divider required by adjustable supervisors, reducing BOM count by 2-3 parts. Placed between the 1.8 V LDO output and the MCU reset pin, the open-drain RESET can be wire-ORed with a watchdog timer for redundant fault detection. Compared to higher-Iq alternatives, this part can extend coin-cell battery life by 8-15% in duty-cycled sensor designs.
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FPGA/MCU Brown-Out Protection
In FPGA and MCU-based designs, the TPS3808G18DRVR provides deterministic brown-out protection by asserting RESET whenever the 1.8 V core rail drops below the 1.8 V nominal threshold. The 0.5% threshold accuracy prevents spurious resets during normal load transients, while the programmable reset delay (up to 10 s via CT capacitor) ensures the rail is fully stable before the FPGA initiates configuration. According to the TI datasheet, the open-drain output allows the supervisor to hold the device in reset even if the 1.8 V LDO loses regulation, preventing corrupted configuration flash writes. Engineers should place CT within 1 cm of the IC to minimize leakage-induced timing errors.
Empfohlen
Battery-Powered Industrial Sensor Nodes
For industrial wireless sensor nodes powered by lithium-thionyl-chloride or coin-cell batteries, the TPS3808G18DRVR's 2.4 µA quiescent current is critical - it represents less than 0.1% of the typical 5-10 mA active-mode current draw. The WSON-6 (DRV) 2x2 mm package occupies only 4 mm² of PCB, suiting it for compact sensor packages. The wide 1.7 V to 6.5 V VDD operating range lets it supervise a 1.8 V rail even when the battery voltage varies from 6 V down to 2 V, ensuring the supervisor itself remains functional across the full discharge curve. The manual reset (MR) input also allows a service technician to force a reset via an external pushbutton without powering down the node.
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Multi-Rail Power-Up Sequencing
The TPS3808G18DRVR's open-drain RESET output can be wire-ORed with other supervisors or pulled up to a higher-voltage rail, allowing it to participate in multi-rail power-up sequencing. In a typical 1.8 V/3.3 V/5 V design, the TPS3808G18 holds the MCU reset until the 1.8 V rail is stable, and its RESET signal can be cascaded with a 3.3 V supervisor's output to delay the release of downstream rails. The CT-programmable delay (20 ms minimum, up to 10 s) lets the designer tune the sequence timing without an external timer IC. Compared to dedicated sequencer ICs, this approach reduces BOM cost by 30-50% for 2-3 rail systems.
Empfohlen
Point-of-Load Monitoring for PoL Converters
Placed at the output of a 1.8 V point-of-load (PoL) DC-DC converter, the TPS3808G18DRVR provides local voltage monitoring with sub-microsecond response to undervoltage events. The 0.5% threshold accuracy prevents false resets from PoL ripple and load-dump transients, which can be 50-100 mV peak-to-peak in switching regulators. According to TI datasheet timing diagrams, the part's reset assertion delay (the time from SENSE crossing threshold to RESET going low) is specified to be quick enough to catch most PoL fault events before downstream logic is corrupted. For redundant supervision, two TPS3808G18 devices can monitor the same rail with different thresholds.
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Medical Wearable Patch Devices
In medical wearable patches (continuous glucose monitors, cardiac telemetry, drug delivery), the TPS3808G18DRVR ensures deterministic 1.8 V rail supervision with the 2.4 µA Iq needed for 7-30 day battery life on a single coin cell. The WSON-6 (DRV) 2x2 mm package allows placement near the battery management IC without crowding the patch antenna or skin-contact sensor area. The factory-trimmed 1.8 V threshold eliminates trim resistors that could shift value under flex stress, improving long-term reliability. According to the TI datasheet, the -40°C to +125°C operating range supports both cold-storage transport and skin-temperature operation.
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Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für TPS3808G18DRVR – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | TPS3808G18DRVT | TPS3808G25DRVR | TPS3808G33DRVR | TPS3808G01DRVR | TPS3700DDCR |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 6-WSON (DRV, 2x2 mm) | 6-WSON (DRV, 2x2 mm) - same | 6-WSON (DRV, 2x2 mm) - same | 6-WSON (DRV, 2x2 mm) - same | 6-WSON (DRV, 2x2 mm) - same | SOT-23-6 (DDC) - different |
| Sense Threshold | 1.8 V (fixed) | 1.8 V (fixed) | 2.5 V (fixed) | 3.3 V (fixed) | Adjustable (0.4 V to 5 V via SENSE) | Window comparator, adjustable |
| Reset Output Type | Open-Drain | Open-Drain | Open-Drain | Open-Drain | Open-Drain | Push-Pull |
| Operating Temperature | -40°C to +125°C | -40°C to +125°C | -40°C to +125°C | -40°C to +125°C | -40°C to +125°C | -40°C to +125°C |
Wichtigste Unterscheidungsmerkmale
- Factory-trimmed 1.8 V threshold with no external resistors (vs. TPS3808G01DRVR)
- Lowest-quiescent family member for 1.8 V monitoring (vs. TPS3700DDCR)
- Standard reel size (3000 pieces) for production (vs. TPS3808G18DRVT)
Designhinweise
Place the CT delay capacitor within 1 cm of the CT pin (Pin 4) to minimize leakage paths that can shift the reset delay timing. Use a ceramic capacitor (C0G/NP0 preferred for tight tolerance) to avoid temperature-dependent leakage currents. A 100 nF X7R on VDD (Pin 6) within 2 mm of the pin is recommended per TI datasheet typical application circuit to suppress supply transients.
The open-drain RESET output requires an external pull-up resistor. Choose the pull-up to match the V_PULLUP rail used by the downstream MCU or logic; this rail may be different from VDD of the supervisor, enabling level-shifting. Recommended pull-up values are 10 kΩ to 100 kΩ - lower values give faster edges but draw more current; higher values save power but slow the rise time. For noisy environments, 10 kΩ is preferred.
Do not leave the SENSE pin floating; tie it to VDD or the monitored rail through a low-impedance path. If monitoring a rail other than VDD, ensure the SENSE input stays within absolute maximum ratings (6.5 V). When using the manual reset (MR) input with an external pushbutton, add a 10 nF to 100 nF capacitor for debounce; otherwise mechanical switch bounce can cause multiple reset pulses. The exposed thermal pad on the WSON package must be soldered to the ground plane for mechanical reliability.
Compliance-Informationen
RoHS and REACH compliant per TI product page. Not AEC-Q100 qualified - for automotive applications use TPS3808G18-Q1 variant. Lead-free and halogen-free per TI packaging materials declaration.
