ADC/DAC
Productos (2518)
CS5528-ASZR - 24-Bit 8-Ch Sigma-Delta ADC w/ PGIA | Cirrus Logic
The Cirrus Logic CS5528-ASZR is a 24-bit, 8-channel, single-conversion sigma-delta analog-to-digital converter with a built-in chopper-stabilized instrumentation amplifier and programmable gain amplifier (PGIA), housed in a 24-pin SSOP (5.30 mm body width) package. It accepts input spans of 25 mV, 55 mV, 100 mV, 1 V, 2.5 V, and 5 V, runs from a single 3 V to 5 V supply, and uses an external 32.768 kHz master clock for an output word rate of approximately 617 Hz. An instrumentation ADC such as the CS5528-ASZR is a precision data-conversion IC optimized for low-frequency, high-resolution measurement of small analog signals (e.g. strain gauges, RTDs, thermocouples, weigh scales). The category hierarchy is: ADC -> data converter -> signal chain IC -> mixed-signal semiconductor. The chopper-stabilized front end cancels offset and 1/f drift, while the charge-balance sigma-delta modulator plus digital filter deliver true 24-bit noise-free resolution for DC and slow-moving signals. Key features include on-chip calibration (self and system), per-channel PGA gain (1x to 32x nominal via input-span selection), differential bipolar inputs with 4-bit channel-ID tag, an integrated FIFO that decouples the host read rate from the conversion rate, and an SPI-compatible serial interface. A power-on reset and dedicated status registers simplify firmware bring-up, and the device supports both unipolar and true bipolar input ranges using a single positive supply. Typical applications include industrial weigh scales and load-cell digitizers, multi-channel temperature acquisition via thermocouple/RTD front ends, process-control analog input modules, and 6- or 8-zone environmental monitoring panels. The 24-bit ENOB at low word rates gives >20 bits of effective resolution, which is sufficient for ratiometric bridge measurement, while the eight channels let one IC replace multiple single-channel ADCs on a compact PCB. For best results, place a 1 nF to 10 nF film capacitor directly on the REFIN+/- pins and a 0.1 uF ceramic on VA/VD; route the analog and digital grounds separately and join them at a single star point beneath the IC. The PGIA gain should be chosen so the full-scale input span equals the largest expected sensor output to maximize dynamic range. This page synthesizes Cirrus Logic datasheet specifications, current distributor pricing, drop-in alternatives and practical design notes into one place for engineers evaluating the CS5528-ASZR for precision multi-channel measurement.
CS5530-ISZR - 24-bit Sigma-Delta ADC w/ PGA | Cirrus Logic
The Cirrus Logic CS5530-ISZR is a highly integrated 24-bit sigma-delta analog-to-digital converter (ADC) that uses charge-balance techniques to achieve 24-bit performance, housed in a 20-pin SSOP package with tape-and-reel packaging. Key headline parameters include a single differential input channel, up to 3840 output word rates (selectable via on-chip registers), and an integrated low-noise chopper-stabilized instrumentation amplifier with selectable gains of 1x, 2x, 4x, 8x, 16x, 32x, and 64x. A sigma-delta (ΔΣ) ADC is a type of analog-to-digital converter that oversamples the input signal and uses noise shaping to push quantization noise out of the signal band, then low-pass filters and decimates to produce a high-resolution digital output. Within the broader taxonomy, the CS5530 is an integrating-class, single-channel ADC belonging to the precision data converter family, sitting between successive-approximation ADCs (SAR) and high-speed pipeline ADCs in the converter hierarchy. It is one of the most popular 24-bit delta-sigma parts ever shipped for weigh-scale and process-control designs. Key features include an effective resolution of up to 23 bits (true RMS), on-chip digital filtering with sinc³ response, an internal calibration register set (system and self calibration with calibration coefficients stored on-chip), and a simple three-wire serial port (SPI-/Microwire-compatible) for host MCU interfacing. The differential input front end supports a bipolar input range of ±5 V at gain = 1 using a single 5 V analog supply, with low-side or split-rail reference options. From an architectural standpoint, the CS5530 combines a charge-balance modulator (4th-order sigma-delta modulator) with a digital sinc³ decimation filter. The four-level charge-balancing scheme produces an inherently monotonic, inherently linear conversion with no missing codes, ideal for precision DC measurement. The on-chip low-noise chopper-stabilized PGA eliminates the need for external instrumentation amplifiers in many bridge-sensor designs, reducing BOM cost and PCB area. Typical applications include weigh scales / load-cell readouts, strain-gauge bridge transducers, temperature measurement using thermocouples or RTDs with excitation, digital panel meters, industrial process controllers, and battery-powered portable instrumentation. The combination of integrated PGA and high CMRR (>120 dB) makes it well-suited for transducer-based designs in electrically noisy factory environments. Design consideration: the CS5530 is generally recommended for cost-sensitive single-channel precision DC measurement where software-driven calibration and gain setting are acceptable. For multi-channel simultaneous sampling or higher throughput, evaluate the pin-compatible CS5532 family. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone, including verified EOL cross-references and CS5530-family compatibility information.
CS5531-ASZ - 16-Bit Sigma-Delta ADC with PGIA | Cirrus Logic
The Cirrus Logic CS5531-ASZ is a 16-bit sigma-delta analog-to-digital converter (ADC) with an integrated ultra-low-noise programmable gain instrumentation amplifier (PGIA), two differential input channels, and a 20-pin SSOP package. It is optimized for measuring low-level unipolar or bipolar signals from bridge transducers and process-control sensors. A sigma-delta ADC is a type of analog-to-digital converter that oversamples the input signal and applies digital filtering and decimation to achieve high resolution, making it the dominant architecture within the data-conversion hierarchy (ADC -> data converter -> mixed-signal IC) for precision, low-frequency measurements. The charge-balance technique used in the CS5531 family delivers 16-bit performance with very low noise, which is essential when the input signal spans only a few millivolts. Key differentiating features include the on-chip PGIA with multiple gain settings, which allows direct connection of low-level bridge and thermocouple signals without external amplification; a serial SPI-compatible interface for simple host connectivity; and a high level of integration that reduces board area, component count, and overall signal-chain error budget. Architecturally, the CS5531 combines a charge-balance sigma-delta modulator with an on-board digital filter and calibration functions. System calibration options allow offset and gain errors to be minimized in the end application, supporting stable, repeatable measurements over time and temperature. The ultra-low-noise analog front end preserves the effective resolution of the 16-bit converter even at high PGIA gain settings. Typical applications include electronic weigh scales and bridge-transducer measurement, industrial process control transmitters measuring pressure or flow, and portable instrumentation requiring a compact, low-noise data-acquisition front end. The integrated PGIA makes the part especially well suited to load-cell interfaces where full-scale signals are small. When designing with the CS5531-ASZ, pay careful attention to the analog supply and reference layout: keep the analog ground return clean, decouple VA+ and the voltage reference close to the pins, and route digital lines away from the analog inputs to preserve the low-noise floor. This page synthesizes distributor pricing context, drop-in family alternatives, pinout guidance, and practical design notes not found in the manufacturer datasheet, providing engineers with a single reference for evaluating the CS5531-ASZ against CS5532/33/34 family variants.
CS5531-ASZR - 16-Bit Sigma-Delta ADC with PGIA | Cirrus Logic (Tape & Reel)
The Cirrus Logic CS5531-ASZR is a 16-bit sigma-delta analog-to-digital converter (ADC) with an integrated ultra-low-noise programmable gain instrumentation amplifier (PGIA), two differential input channels, and a 20-pin SSOP package. It is optimized for measuring low-level unipolar or bipolar signals from bridge transducers and process-control sensors. A sigma-delta ADC is a type of analog-to-digital converter that oversamples the input signal and applies digital filtering and decimation to achieve high resolution, making it the dominant architecture within the data-conversion hierarchy (ADC -> data converter -> mixed-signal IC) for precision, low-frequency measurements. The charge-balance technique used in the CS5531 family delivers 16-bit performance with very low noise, which is essential when the input signal spans only a few millivolts. Key differentiating features include the on-chip PGIA with multiple gain settings, which allows direct connection of low-level bridge and thermocouple signals without external amplification; a serial SPI-compatible interface for simple host connectivity; and a high level of integration that reduces board area, component count, and overall signal-chain error budget. Architecturally, the CS5531 combines a charge-balance sigma-delta modulator with an on-board digital filter and calibration functions. System calibration options allow offset and gain errors to be minimized in the end application, supporting stable, repeatable measurements over time and temperature. The ultra-low-noise analog front end preserves the effective resolution of the 16-bit converter even at high PGIA gain settings. Typical applications include electronic weigh scales and bridge-transducer measurement, industrial process control transmitters measuring pressure or flow, and portable instrumentation requiring a compact, low-noise data-acquisition front end. The integrated PGIA makes the part especially well suited to load-cell interfaces where full-scale signals are small. When designing with the CS5531-ASZR, pay careful attention to the analog supply and reference layout: keep the analog ground return clean, decouple VA+ and the voltage reference close to the pins, and route digital lines away from the analog inputs to preserve the low-noise floor. This page synthesizes distributor pricing context, drop-in family alternatives, pinout guidance, and practical design notes not found in the manufacturer datasheet, providing engineers with a single reference for evaluating the CS5531-ASZR against CS5532/33/34 family variants.
CS5531ASEP - 16-bit Ultra-Low Noise PGIA ADC | Cirrus Logic
The Cirrus Logic CS5531ASEP is a 16-bit delta-sigma analog-to-digital converter (ADC) with an integrated ultra-low-noise programmable gain instrumentation amplifier (PGIA), dual differential input channels, and an output word rate of up to 3840 Hz, housed in a 20-pin SSOP (SSOP-20) package. A delta-sigma ADC uses oversampling and charge-balance (noise-shaping) techniques to achieve very high resolution from a modest sampling clock. According to the Cirrus Logic datasheet, the CS5531/32/33/34 family is highly integrated: the CS5531/33 provide 16-bit performance while the CS5532/34 provide 24-bit performance, all sharing the same architecture and package. Delta-sigma ADCs sit within the data acquisition hierarchy of analog front ends, alongside SAR and pipeline converters, and are preferred where precision at low bandwidth matters more than conversion speed. Key features of the CS5531 include the integrated PGIA that accepts small differential sensor signals directly, a selectable gain range supporting bridge and load-cell front ends, multiple output word rates up to 3840 Hz, and an on-chip digital filter. The charge-balance modulator delivers low noise floor suitable for weighing scales, process transmitters, and precision instrumentation. Technically, the device combines a 4th-order (family-typical) delta-sigma modulator with a digital decimation filter and self/system calibration options, allowing designers to remove offset and gain error without external trimming. The analog supply operates from 3 V to 5 V per distributor data, with a serial SPI-compatible interface (SCLK, SDI, SDO, CS) and multiplexed channel addressing for the two differential inputs. Typical applications include industrial weighing scales and load-cell signal conditioning, precision process-control transmitters, and laboratory data acquisition front ends where the PGIA eliminates a separate instrumentation amplifier stage. Design consideration: because delta-sigma converters sample continuously, ensure the serial interface timing and calibration routine are executed after power-up, and provide clean reference voltage decoupling for lowest noise. This page synthesizes distributor pricing, same-family drop-in alternatives (CS5532/33/34), and practical design guidance not consolidated in the manufacturer datasheet.
CS5532-ASZ - 24-Bit Sigma-Delta ADC with PGIA | Cirrus Logic
The Cirrus Logic CS5532-ASZ is a 24-bit delta-sigma (charge-balance) analog-to-digital converter with an integrated ultra-low-noise programmable gain instrumentation amplifier (PGIA), two differential input channels, SPI serial interface, and a 20-pin SSOP (SSOP-20) package rated from -40C to +85C. A delta-sigma ADC is a type of analog-to-digital converter that oversamples the input signal and applies noise-shaping plus digital decimation filtering to achieve very high resolution, far exceeding what SAR or flash architectures offer. Within the signal-chain hierarchy, the CS5532 sits between the analog front-end (sensors, bridges, transducers) and the digital controller, converting microvolt-level differential signals into serial data words via a power-management-friendly SPI port. Key features include 24-bit resolution using charge-balance conversion techniques, an on-chip PGIA that amplifies low-level unipolar or bipolar signals without external instrumentation amplifiers, dual differential input channels, and a serial SPI interface for register configuration and data retrieval. The charge-balance architecture suppresses line-frequency noise, which is decisive in 50/60 Hz industrial environments where bridge sensors are read in the presence of mains interference. The ultra-low-noise PGIA front-end eliminates the noise, offset drift, and gain error that a discrete instrumentation amplifier chain would add before a conventional ADC, allowing direct connection of load cells and RTD bridges. Output word rates and gain settings are programmable through the serial port, letting designers trade speed for resolution per measurement channel. Typical applications include electronic weigh scales, industrial process control (pressure and temperature transmitters), and scientific or medical instrumentation that measures low-level differential signals. Design consideration: because the PGIA gain and the delta-sigma filter bandwidth set the effective noise floor, validate the chosen word-rate and gain combination against your target counts of noise-free bits rather than relying on headline resolution alone. This page synthesizes distributor pricing, drop-in family alternatives, and practical design guidance not consolidated in the manufacturer datasheet.
CS5532-ASZR - 24-bit Sigma-Delta ADC, PGIA | Cirrus Logic
The Cirrus Logic CS5532-ASZR is a 24-bit sigma-delta analog-to-digital converter with an integrated ultra-low-noise programmable gain instrumentation amplifier (PGIA), offering two differential input channels, a maximum output word rate of 3.84 kSPS, and serial (SPI-compatible) output in a 20-pin SSOP package. A delta-sigma ADC is a type of analog-to-digital converter that uses oversampling and charge-balance (sigma-delta) modulation followed by digital decimation filtering to achieve very high resolution. Within the data converter hierarchy, it sits under ADC -> data converter -> mixed-signal IC, and it is the preferred architecture wherever sub-microvolt signals must be digitized, such as load-cell and bridge-sensor measurement. Key features include 24-bit resolution achieved through charge-balance techniques, an integrated PGIA that eliminates a discrete instrumentation amplifier stage, two differential input channels with a user-selectable multiplexer, and ultra-low-noise performance optimized for low-level unipolar or bipolar signals. The A-grade device operates over the -40C to +85C industrial temperature range. Architecturally, the CS5532 family employs a charge-balanced sigma-delta modulator with on-chip digital filtering and system calibration options (self and system calibration), which removes offset and gain errors from the signal path. The PGIA gain options let a single device span bridge outputs from millivolts to volts without external amplification, preserving noise performance that a discrete front-end would degrade. Typical applications include weigh scales and load-cell front ends, process-control transmitters, scientific instrumentation, and medical measurement equipment - domains explicitly named by Cirrus Logic for this family, where the low-noise PGIA and calibration features directly improve system accuracy. Design-wise, budget conversion time against the 3.84 kSPS maximum output rate: at high resolution settings the effective sample rate is far lower, so this part suits precision static measurements, not fast dynamic signals. A clean, low-noise reference is essential because resolution claims assume a quiet analog environment. This page synthesizes distributor pricing, drop-in family alternatives, and practical design guidance not consolidated in the manufacturer datasheet.
CS5532-BSZ - 24-Bit Sigma-Delta ADC with PGIA | Cirrus Logic
The Cirrus Logic CS5532-BSZ is a 24-bit delta-sigma (charge-balance) analog-to-digital converter with an integrated ultra-low-noise programmable gain instrumentation amplifier (PGIA), two multiplexed differential input channels, and up to 3.84 kSPS output word rate, housed in a 20-pin SSOP package. A delta-sigma ADC is a type of analog-to-digital converter that oversamples the input signal and uses noise-shaping (charge-balanced sigma-delta modulation) followed by digital decimation filtering to achieve very high resolution - here 24 bits - far exceeding what successive-approximation converters offer. Within the signal-chain hierarchy, this device belongs to the data acquisition category: sensor -> instrumentation amplifier -> delta-sigma ADC -> digital interface, and the CS5532 integrates the amplifier stage directly on-chip. Key features include the on-chip PGIA with programmable gains from 1x to 64x, which lets microvolt-level bridge or thermocouple signals be amplified and digitized in a single integrated stage; a low-noise analog front end optimized for low-level unipolar or bipolar signals; a simple 3-wire serial (SPI-compatible) digital interface; and calibration options (system and self-calibration) that remove offset and gain error without external trimming. Architecturally, the converter uses charge-balanced delta-sigma techniques combined with a linear-phase digital decimation filter. The high oversampling ratio pushes quantization noise out of band, while the internal filter reconstructs high-resolution output words, enabling direct connection of load cells, RTDs, and thermocouples with minimal external circuitry. Typical applications include weigh scales and load-cell measurement, industrial process control loops, scientific instrumentation, and medical equipment such as patient-monitoring front ends - all domains where microvolt sensitivity and linearity matter more than raw speed. When designing with the CS5532-BSZ, provide a clean, low-noise reference voltage on VREF+, keep the analog and digital ground returns star-connected, and allow for periodic system calibration in firmware to null drift over temperature. This page adds value beyond the manufacturer datasheet by consolidating drop-in alternatives, distributor pricing context, and practical layout and design guidance in one place.
CS5532-BSZR - 24-Bit Delta-Sigma ADC with PGIA | Cirrus Logic
The Cirrus Logic CS5532-BSZR is a 24-bit delta-sigma analog-to-digital converter (ADC) with an ultra-low-noise programmable gain instrumentation amplifier (PGIA), 2 differential input channels, and a maximum output data rate of 3.84 kSPS, housed in a 20-pin SSOP package supplied on tape and reel (R suffix). A delta-sigma ADC is a type of analog-to-digital converter that oversamples the input signal and uses charge-balance (delta-sigma) modulation plus digital decimation filtering to achieve very high resolution. Within the data-conversion hierarchy, it sits above general-purpose SAR ADCs for precision applications and belongs to the broader families of data acquisition ICs, analog front ends (AFE), and mixed-signal semiconductors. The CS5531/32/33/34 family from Cirrus Logic targets low-level unipolar or bipolar signal measurement where microvolt-level resolution matters. Key features of the CS5532-BSZR include 24-bit resolution with up to 23 effective bits at low data rates, an integrated PGIA with gains of 1x, 2x, 4x, 8x, 16x, 32x, and 64x that directly amplifies small bridge and sensor signals, a 2-channel differential multiplexer, and a 3-wire serial SPI-compatible control port. The charge-balance conversion architecture delivers extremely low input-referred noise, making it possible to resolve signals well below a microvolt when the gain is set high. Technically, the device operates from a dual analog supply (typically VA+ = +5 V and VA- = -5 V) with a digital supply (VD) compatible with 3.3 V or 5 V logic. An external crystal on XIN/XOUT clocks the modulator and digital filter, and a differential reference input supports ratiometric measurement against bridge excitation - critical for weigh-scale accuracy. On-chip calibration (self and system) removes offset and gain errors. Typical applications include weigh scales and load-cell front ends, process control transmitters, scientific instrumentation, and medical equipment such as patient monitoring - all domains where a 24-bit delta-sigma ADC with PGIA replaces a discrete amplifier-plus-ADC chain. Design consideration: keep the analog front-end layout symmetrical and use a solid ground plane; ratiometric wiring of the reference to the bridge excitation preserves the high common-mode rejection and noise performance. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
CS5533-ASZ - 16-Bit 4-Ch Sigma-Delta ADC with PGIA | Cirrus Logic
The Cirrus Logic CS5533-ASZ is a 16-bit, 4-channel sigma-delta analog-to-digital converter with an integrated ultra-low-noise programmable gain instrumentation amplifier (PGIA), housed in a 24-pin SSOP package. It converts from a single +5 V supply or ±2.5 V / ±3 V dual supplies and offers selectable PGIA gains of 1x, 2x, 4x, 8x, 16x, 32x and 64x. A sigma-delta ADC is a type of analog-to-digital converter that oversamples the input signal and applies digital decimation filtering to achieve very high resolution at low-to-moderate bandwidths. Within the data-conversion hierarchy, it sits under ADCs, then data acquisition ICs, then analog mixed-signal semiconductors. Sigma-delta converters excel where precision matters more than speed, such as weighing scales, temperature measurement and process-control front ends. Key features of the CS5533-ASZ include the 16-bit delta-sigma modulator, four differential input channels multiplexed into one converter, and a chopper-stabilized instrumentation amplifier with only 6 nV/sqrt(Hz) noise density at 0.1 Hz. This extremely low flicker-noise corner is the defining strength of the CS553x family, enabling direct connection of low-level bridge and thermocouple signals without external precision amplifiers. Architecturally, each conversion path flows through the multiplexed PGIA, a fourth-order delta-sigma modulator, and a linear-phase digital filter. The chopper-stabilized amplifier suppresses 1/f noise and offset drift, which are normally the dominant error sources in DC-precision designs. Serial SPI-compatible control allows gain, channel, and output-word-rate configuration, and self-calibration routines correct offset and gain errors in system. Typical applications include industrial weigh-scale/load-cell front ends, temperature measurement via thermocouples and RTDs, and battery-test or process-control data acquisition systems. The four multiplexed channels let one ADC serve multiple sensors, cutting cost and board area in multi-channel instruments. A key design consideration: the PGIA gain and output word rate trade against effective resolution; per the manufacturer product family page, noise performance must be evaluated at the selected gain and data rate, not at the headline value. This page synthesizes distributor pricing, same-family drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
CS5533-ASZR - 16-Bit Sigma-Delta ADC 4-Ch PGIA | Cirrus Logic
The Cirrus Logic CS5533-ASZR is a 16-bit sigma-delta analog-to-digital converter with 4 differential input channels, a maximum output rate of 3.84 kSPS, and an ultra-low-noise programmable gain instrumentation amplifier (PGIA), housed in a 24-pin SSOP package. A sigma-delta ADC is a type of analog-to-digital converter that oversamples the input signal and uses charge-balance (delta-sigma) modulation followed by digital decimation filtering to achieve very high resolution at low-to-moderate speeds. Within the data-acquisition signal chain hierarchy, it sits between front-end sensors and a digital processor, converting low-level unipolar or bipolar signals into serial digital words. The CS5533 belongs to the broader class of precision ADCs and power-management-adjacent mixed-signal ICs used in measurement systems. Key features of the CS5533-ASZR include 16-bit resolution achieved through charge-balance delta-sigma techniques, four differential multiplexed input channels, and an integrated ultra-low-noise PGIA that allows direct connection of low-level bridge and thermocouple signals without a separate instrumentation amplifier. The analog supply operates from 4.75V to 5.25V, supporting +5V single-supply or +/-2.5V / +/-3V dual-supply operation per distributor application documentation. Data is returned over a simple serial (SPI-compatible) interface, simplifying isolation barriers in industrial designs. Architecturally, the device pairs the delta-sigma modulator with on-chip digital filtering and a self-calibration system, so gain and offset errors can be trimmed in-circuit. The A-grade temperature range of -40C to +85C suits industrial environments, and the 'R' suffix indicates tape-and-reel packaging for automated assembly. Typical applications include weigh-scale load-cell measurement, process-control transmitters, and scientific or medical instrumentation, all domains the CS5531/32/33/34 family was explicitly optimized for by Cirrus Logic. For design, keep the analog ground plane clean and use a low-noise reference; the PGIA gain setting trades noise floor against input range, so select gain per sensor full-scale output. This page synthesizes distributor pricing, drop-in family alternatives, and practical design notes not found in the manufacturer datasheet.
CS5534-ASZ - 24-Bit 4-Ch Delta-Sigma ADC | Cirrus Logic
The Cirrus Logic CS5534-ASZ is a 24-bit, 4-channel delta-sigma analog-to-digital converter (ADC) with an integrated ultra-low-noise programmable gain instrumentation amplifier (PGIA), delivering up to 3.84 kSPS output rate over an SPI-compatible serial interface in a 24-pin SSOP package. A delta-sigma ADC is a type of analog-to-digital converter that oversamples the input signal and applies noise-shaping and digital decimation filtering to achieve very high resolution, typically 16 to 24 bits. In the signal-chain hierarchy, it sits between analog front-end conditioning and digital processing, and is the preferred converter topology when measuring low-level, low-bandwidth signals such as load-cell and bridge-sensor outputs where microvolt-level resolution matters more than sampling speed. The CS5534-ASZ belongs to the CS5531/32/33/34 family, which uses charge-balance delta-sigma techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance. Its headline differentiators are the ultra-low-noise PGIA front end, four differential input channels, and self-calibration capability, which together eliminate the need for a separate external instrumentation amplifier and reduce system noise floor and drift. The part supports both unipolar and bipolar low-level signals. According to the Cirrus Logic product page, the family is optimized for measuring low-level unipolar or bipolar signals in weigh scale, process control, scientific, and medical applications. The 24-bit conversion resolution and selectable data rates up to 3.84 kSPS make the CS5534-ASZ well suited to multi-channel load-cell digitization, pressure and temperature scanning in industrial process control, and precision biomedical signal acquisition. When designing with this device, budget for adequate analog supply decoupling and a clean reference voltage, since the effective resolution of a 24-bit converter is ultimately limited by reference noise, layout, and input settling rather than by the converter itself. The digital SPI interface simplifies isolation in industrial environments. This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design guidance not found in a single manufacturer document.
CS5534-ASZR - 24-Bit 4-Ch Delta-Sigma ADC | Cirrus Logic
The Cirrus Logic CS5534-ASZR is a 24-bit, 4-channel delta-sigma analog-to-digital converter with an ultra-low-noise programmable gain instrumentation amplifier (PGIA), delivering up to 3.84 kSPS output word rate over an SPI serial interface in a 24-pin SSOP package. A delta-sigma ADC is a type of analog-to-digital converter that uses oversampling and noise-shaping (charge-balance techniques) to trade speed for extremely high resolution. Within the signal-chain hierarchy - analog front end, ADC, digital processing - the CS5534 sits at the direct sensor interface, converting low-level differential signals into digital words without requiring extensive external amplification. Key features include 24-bit resolution, four differential input channels with an on-chip PGIA, an ultra-low-noise analog front end optimized for microvolt-level signals, and a serial SPI-compatible interface. According to the manufacturer product family page, the CS5531/32/33/34 converters use charge-balance techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance and are optimized for measuring low-level unipolar or bipolar signals. Architecturally, the device combines the instrumentation amplifier, a multi-channel input mux, and a fourth-order delta-sigma modulator followed by on-chip digital filtering. This integration eliminates the discrete amplifier stage that a conventional high-resolution ADC would need, reducing offset drift and noise contributions at the front end. Typical applications include weigh scales and load-cell measurement, industrial process control, scientific instrumentation, and medical equipment - the exact domains cited by Cirrus Logic for this family, where microvolt-level signals must be digitized cleanly. Design consideration: allocate adequate PCB area for analog/digital ground partitioning and use a low-noise reference, since the effective noise floor of the front end dominates system accuracy. The output data rate of 3.84 kSPS suits static and quasi-static measurements, not high-speed acquisition. This page synthesizes distributor pricing, same-family drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
CS5534-BSZ - 24-Bit Sigma-Delta ADC with PGIA | Cirrus Logic
The Cirrus Logic CS5534-BSZ is a 24-bit delta-sigma analog-to-digital converter (ADC) with four differential input channels and an integrated ultra-low-noise programmable gain instrumentation amplifier (PGIA), housed in a 24-pin SSOP package with matte tin contact plating. It converts at up to 3.84 kSPS and communicates over a serial SPI-compatible 3-wire interface. A delta-sigma ADC is a type of analog-to-digital converter that uses oversampling and noise shaping, combined with digital decimation filtering, to achieve very high resolution - in this case 24 bits - from relatively simple analog circuitry. In the signal-chain hierarchy, the CS5534-BSZ sits between the analog front end (sensors such as load cells, RTDs, and bridge transducers) and the digital controller, making it a core precision data-acquisition component. Key features include 24-bit resolution using charge-balance conversion techniques, four differential input channels, an integrated PGIA with programmable gain for measuring low-level unipolar or bipolar signals, and ultra-low-noise performance optimized for weigh-scale and process-control accuracy. The wide supply range of 2.375V to 5V in single or dual supply operation, at approximately 13 mA of supply current, simplifies integration into industrial systems. The architecture uses charge-balance delta-sigma modulation to achieve 24-bit performance, which is especially effective at rejecting line-frequency noise when the conversion rate is synchronized to the power-line period. The integrated PGIA eliminates a discrete instrumentation amplifier stage, reducing board area, component count, and gain-drift error sources between the sensor and the converter. Typical applications include weigh scales, process control transmitters, scientific instrumentation, and medical equipment, all of which measure low-level differential signals where resolution and noise directly affect system accuracy. A key design consideration is supply-domain planning: the 2.375V to 5V operating range supports both 3.3V and 5V logic, but analog supply cleanliness and reference stability dominate achieved noise-floor performance, so low-noise LDOs and precision references are strongly recommended. This page synthesizes distributor availability data, same-family drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
CS5534-BSZR - 24-Bit Delta-Sigma ADC with PGIA | Cirrus Logic Inc.
The Cirrus Logic Inc. CS5534-BSZR is a 24-bit delta-sigma analog-to-digital converter (ADC) with an integrated ultra-low-noise programmable gain instrumentation amplifier (PGIA), four differential input channels, a maximum output rate of 3.84 kSPS, and a serial interface, housed in a 24-pin SSOP (5.30 mm width) package supplied in tape-and-reel format. A delta-sigma ADC is a type of analog-to-digital converter that uses oversampling and charge-balance (sigma-delta) modulation to achieve very high resolution, typically 16 to 24 bits, at moderate conversion speeds. Within the data-acquisition hierarchy, it sits above general-purpose SAR ADCs in resolution and below high-speed pipeline converters in throughput, making the delta-sigma architecture the dominant choice for precision sensor measurement front ends in weigh scales, process control, scientific instrumentation, and medical equipment. Key features of the CS5534-BSZR include 24-bit resolution achieved through charge-balance techniques, four differential input channels for multi-sensor systems, an integrated PGIA that eliminates a discrete instrumentation amplifier stage, and ultra-low-noise performance optimized for measuring low-level unipolar or bipolar signals. The on-chip PGIA supports gain selection so microvolt-level bridge and thermocouple signals can be amplified before conversion, directly improving effective system resolution. Technically, the device belongs to the CS5531/32/33/34 family, which pairs a low-noise PGIA front end with a fourth-order (per family architecture) delta-sigma modulator and on-chip digital filtering. The serial interface allows configuration of gain, line-frequency rejection, and conversion rates, while calibration options support system-level offset and gain correction without external trimming components. Typical applications include weigh-scale load-cell front ends, where microvolt-level bridge outputs demand ultra-low input noise; process-control transmitters measuring 4-20 mA loop sensor signals; and medical or scientific instruments digitizing low-level bipolar signals with high linearity. A key design consideration: the analog front end requires careful layout - separate clean analog supplies, a stable voltage reference, and guarding around input traces - because at 24-bit resolution, board-level noise can dominate the ADC's own performance. This page synthesizes distributor pricing, drop-in family alternatives, datasheet guidance, and practical design notes not consolidated in the manufacturer datasheet, with pricing as of 2026-09-13.
CS5560-ISZ - 24-Bit 50kSps Delta-Sigma ADC | Cirrus Logic
The Cirrus Logic CS5560-ISZ is a single-channel, 24-bit delta-sigma analog-to-digital converter capable of 50 kSps conversion rate, packaged in a 24-pin SSOP (ISZ suffix) with a fully differential analog input. According to the Cirrus Logic datasheet, the CS5560 features on-chip input buffers for both AIN and VREF+ inputs, providing high input impedance that significantly reduces drive requirements of signal sources and minimizes errors caused by source impedances. It supports simple three/four-wire serial interface communication and offers flexible power supply configurations from ±2.5 V or 5 V operation. An ADC (Analog-to-Digital Converter) is a semiconductor device that converts continuous analog voltage signals into discrete digital codes for processing by microcontrollers, DSPs, or FPGAs. Delta-sigma (Σ-Δ) ADCs use oversampling and noise-shaping techniques to achieve high resolution (16-24 bits) at the cost of lower conversion rates compared to SAR or pipeline architectures. They are categorized as data acquisition ICs within the broader signal chain IC family, sitting between analog sensors and digital processors. Key features of the CS5560-ISZ include 24 bits no missing codes, signal-to-noise ratio optimized for precision measurement, linearity error of 0.0005%, conversion time of 20 µs that settles in a single conversion, and guaranteed monotonic operation across the full input range. The integrated input buffers simplify front-end signal conditioning by eliminating the need for external op-amp buffers when interfacing with high-impedance sensors or bridge circuits. The device employs a multi-bit delta-sigma modulator followed by a digital decimation filter, achieving wide dynamic range while maintaining low total harmonic distortion. The single-cycle settling capability makes the CS5560 particularly well-suited for multiplexed channel scanning applications where the ADC must acquire new data rapidly after switching inputs. Internal calibration registers compensate for offset and gain errors at the factory. Typical applications of the CS5560-ISZ include precision weighing scales and load cell digitizers, industrial process control transducers, medical instrumentation such as patient monitoring equipment, seismic and vibration data acquisition systems, and high-accuracy temperature or strain gauge measurement front-ends. The differential input architecture and integrated reference buffer make it ideal for bridge sensor signal chains where common-mode noise rejection is critical. When designing with the CS5560-ISZ, ensure the analog and digital grounds are tied at a single point near the ADC, with separate ground planes for analog and digital returns to prevent digital switching noise from coupling into sensitive analog inputs. Use a low-noise voltage reference for VREF+ to maximize SNR, and place decoupling capacitors (typically 100 nF ceramic plus 10 µF tantalum) as close as possible to both VA and VD supply pins. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet. The CS5560-ISZ is currently in production with multiple distributors carrying stock, making it a reliable choice for new designs as well as legacy maintenance.
CS5561-ISZ - 24-bit Sigma-Delta ADC | Cirrus Logic
The Cirrus Logic CS5561-ISZ is a 24-bit high-throughput sigma-delta analog-to-digital converter (ADC) with 1 input channel, housed in a 24-pin SSOP package. It provides 24-bit resolution and uses a sigma-delta modulation architecture suitable for precision measurement, instrumentation, and industrial process control applications. An ADC (Analog-to-Digital Converter) is an integrated circuit that converts continuous analog voltage signals into discrete digital codes. The sigma-delta (also written as delta-sigma or SD) modulator topology is a category of oversampling converters that trades raw speed for very high resolution, excellent noise rejection, and tight linearity. In the broader system taxonomy, the CS5561-ISZ sits as: ADC -> data converter -> data acquisition IC -> signal chain IC -> semiconductor. Sigma-delta ADCs excel in low-frequency precision applications such as weigh scales, temperature monitoring, strain-gauge bridges, and audio band processing where noise shaping rejects out-of-band interference. Key features of the CS5561-ISZ include 24-bit resolution, single-channel (1-input) input mux configuration, sigma-delta modulator, and SSOP-24 surface-mount packaging. According to the Cirrus Logic CS5561 datasheet, this family is classified as a high-throughput delta-sigma A/D converter family, targeting measurement systems that demand high dynamic range. The interface is typically an SPI/serial digital interface, common to the CS556x series. Typical applications include precision weigh scales and load-cell readouts, industrial process automation, temperature and strain measurement, data acquisition front-ends, and laboratory instrumentation. The wide input range and high effective number of bits (ENOB) also support medical monitoring and transducer conditioning. When designing with this part, the analog front-end (signal conditioning, reference, and PGA) is critical. Provide a low-noise, low-drift voltage reference and adequate decoupling on AVDD and DVDD rails. Route analog and digital grounds separately and join at a single point. Allow adequate warm-up time before calibration, as the modulator settles within hundreds of milliseconds.
CS5566-ISZR - 24-bit 5kSps Sigma-Delta ADC | Cirrus Logic
The Cirrus Logic CS5566-ISZR is a single-channel, 24-bit sigma-delta analog-to-digital converter (ADC) capable of 5 kSps conversion rate, housed in a 24-pin SSOP package and supplied on tape and reel (2000 units per reel). It accepts a fully differential analog input and provides a simple three/four-wire serial interface compatible with SPI. On-chip input buffers present high input impedance to both the AIN inputs and the VREF+ pin, eliminating the need for external driver amplifiers. An ADC (analog-to-digital converter) is a data-acquisition component that translates continuous analog signals into discrete digital codes for processing by microcontrollers, FPGAs, or DSPs. Sigma-delta ADCs use oversampling and noise-shaping to achieve very high effective resolution at low-to-moderate sample rates, and they sit within the hierarchy: ADC -> data converter -> data acquisition IC -> signal chain -> mixed-signal semiconductor. The CS5566 specifically targets industrial measurement, weighing-scale, and transducer read-out applications where 24-bit effective resolution and a fully differential front-end are required. Key features include 24-bit no-missing-codes performance, 5 kSps maximum throughput, a fully differential input, on-chip input and reference buffers, and signal-to-noise of 84 dB. The CS5566 operates from 2.5 V or 5 V analog supplies, accepts 0 V to 5 V common-mode input range, and offers 0.0005% linearity error. Conversion time is 200 us per conversion, and the device settles in a single conversion cycle, simplifying calibration and reducing system latency. The converter architecture combines a sigma-delta modulator with a digital decimation filter. Internal calibration registers compensate for offset and gain drift, while the differential reference path rejects common-mode supply noise. The serial interface supports either a three-wire mode (DIN, DOUT, SCLK shared) or a four-wire mode (independent SDOUT and SDIN), and a synchronous DRDY flag indicates when a new conversion result is available in the output register. Typical applications include industrial weighing scales, strain-gauge bridge readouts, pressure transducers, temperature measurement (RTD/thermocouple front-ends), process-control instrumentation, and precision sensor signal conditioning. The differential input and high-impedance reference buffer allow direct connection to bridge sensors without additional instrumentation amplifiers, reducing BOM cost and PCB area. When designing with the CS5566-ISZR, place 0.1 uF decoupling capacitors close to AVDD and DVDD pins and keep the analog and digital ground returns joined at a single star point. The differential analog inputs must remain within the specified common-mode range; use the on-chip buffers when source impedance exceeds 1 kohm. This page synthesizes distributor stock data, drop-in alternatives, and practical design notes not consolidated in the manufacturer datasheet.
CS5571-ISZ - 16-Bit 100kSPS Sigma-Delta ADC | Cirrus Logic
The Cirrus Logic CS5571-ISZ is a 16-bit, 100 kSPS, single-channel, differential-input, sigma-delta analog-to-digital converter housed in a 24-pin SSOP package. According to the Cirrus Logic datasheet, the device operates from ±2.375 V to ±2.625 V (or single +5 V) analog supplies and a 1.8 V to 3.3 V digital supply, providing a high-throughput, low-noise conversion path for precision sensor and instrumentation front ends. An ADC (analog-to-digital converter) is a data-acquisition component that converts real-world continuous analog signals into discrete digital codes for processing by a microcontroller, DSP, or FPGA. The CS5571 belongs to the sigma-delta (Σ-Δ) converter family, a topology that uses oversampling and digital filtering to trade converter speed for very high effective resolution and excellent inherent anti-alias rejection. In the broader taxonomy, this part is a precision SAR/sigma-delta hybrid-class ADC used in industrial measurement, data acquisition, and embedded control applications. Key features include 16-bit no-missing-code resolution, 100 kSPS maximum conversion rate, differential analog inputs with high common-mode rejection, a serial SPI-compatible (3-wire/4-wire) interface for digital communication, and a small 24-SSOP surface-mount footprint. The combination of high throughput and a differential input stage allows direct connection to bridge sensors, thermocouples, and other low-level transducer signals without an external instrumentation amplifier in many cases. The CS5571 integrates a low-noise input front end, a multi-bit sigma-delta modulator, and a digital decimation filter, eliminating the need for complex external anti-alias filtering. Its serial output simplifies galvanic isolation in industrial designs and minimizes pin count on the host processor side. The wide supply tolerance makes it compatible with both ±5 V industrial rails and single +5 V systems. Typical applications include industrial process control, weigh scales and load-cell readouts, temperature and pressure measurement front ends, medical instrumentation, and portable data loggers. Designers select this part when true 16-bit accuracy at 100 kSPS and a small 24-SSOP PCB footprint are required in noisy industrial environments. When designing with this device, place the analog and digital grounds on a split plane joined at a single star point beneath the IC, and use 0.1 µF ceramic decoupling close to each supply pin. The differential input architecture rejects common-mode noise, but PCB layout symmetry of the input traces is critical to preserve CMRR. This page synthesizes distributor pricing, verified drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
CS5580-ISZ - 16-bit Sigma-Delta ADC, 24-SSOP | Cirrus Logic
The Cirrus Logic CS5580-ISZ is a 16-bit, single-channel, sigma-delta analog-to-digital converter (ADC) housed in a 24-pin SSOP package. It supports both serial and parallel data interfaces, giving designers the flexibility to use it in legacy parallel-microcontroller designs as well as modern serial-only systems. According to the Cirrus Logic product listing, the CS5580 family is engineered as a high-throughput delta-sigma A/D converter for precision data acquisition. Sigma-delta ADCs (also written as sigma-delta or delta-sigma) are a class of oversampling converters that trade raw speed for very high resolution and excellent noise rejection. They integrate a modulator and a digital filter, pushing quantization noise out of the baseband and producing low-noise, high-resolution output. In the IC hierarchy, the CS5580-ISZ sits as an ADC inside the Data Acquisition category, which itself belongs to Integrated Circuits (ICs) and ultimately to the broader signal-chain and power-management semiconductor family. Key features include 16-bit resolution, a single differential or single-ended input channel, sigma-delta modulator architecture, and selectable data interfaces (serial and parallel). The 24-SSOP package provides a compact surface-mount footprint suitable for industrial control boards, instrumentation front-ends, and process-control modules. Operating from a standard 5V analog supply, the converter is designed for use with downstream microcontrollers, DSPs, or FPGA-based acquisition engines. The CS5580's high-throughput delta-sigma architecture enables precise digitization of low-frequency, high-precision analog signals such as transducer outputs, weigh-scale bridge signals, and temperature-conditioned sensor measurements. The combination of 16-bit resolution with sigma-delta noise shaping makes it particularly well suited to measurement applications that demand low noise and excellent linearity rather than high sample rates. Typical applications include industrial process control, weigh scales and load-cell digitizers, temperature measurement systems, and precision sensor front-ends. The wide compatibility with both serial and parallel host interfaces also makes it attractive for legacy system upgrades where an existing parallel bus is available. When designing with the CS5580-ISZ, ensure that input signals are properly buffered and that the reference voltage is low-noise and well decoupled. Layout the analog and digital grounds as separate planes joined at a single point to avoid coupling modulator switching noise into the analog front end. This page synthesizes distributor pricing, cross-reference alternatives, and practical design notes that are not consolidated in the manufacturer datasheet alone, providing a single-source engineering reference for the CS5580-ISZ.
CS5581-ISZ - 16-bit 200kSps Sigma-Delta ADC | Cirrus Logic
The Cirrus Logic CS5581-ISZ is a 16-bit, 200 kSps, single-channel sigma-delta analog-to-digital converter housed in a 24-pin SSOP package. It operates from ±2.5 V or 5 V analog supplies, integrates on-chip input buffers for high input impedance, and achieves 80 dB signal-to-noise ratio with linearity error of 0.0008% (approximately 0.5 LSB) and DNL of ±0.1 LSB maximum. What is a sigma-delta ADC? A sigma-delta (ΔΣ) analog-to-digital converter is a type of data converter that uses oversampling and noise shaping to achieve high resolution at moderate bandwidth. Unlike successive-approximation registers (SAR) or flash converters, sigma-delta ADCs trade absolute sample rate for very high in-band signal-to-noise ratio, making them ideal for precision measurement, instrumentation, and audio applications. The CS5581 belongs to the data acquisition IC category, which sits hierarchically within mixed-signal ICs, integrated circuits, and ultimately semiconductors. Key features include a single-ended analog input with integrated input buffers that eliminate the need for external op-amp buffers, a 5 µs conversion time that settles in a single conversion cycle, and a serial interface suitable for connection to microcontrollers, DSPs, or FPGAs. The 24-SSOP package offers a compact footprint for multi-channel data acquisition boards. The device targets high-throughput 16-bit measurements where signal integrity and noise rejection outweigh raw sample rate. From an architectural perspective, the CS5581 combines a switched-capacitor modulator with a digital decimation filter, enabling true 16-bit resolution with no missing codes. The high input-impedance on-chip buffer reduces source-impedance-induced gain errors and lets the ADC drive directly from sensor bridges, thermocouples, or instrumentation front ends without precision external buffering. Typical applications include industrial process control, precision weigh scales, multi-channel data acquisition systems, medical instrumentation front ends, and audio bandwidth measurement where its 80 dB SNR and low integral nonlinearity deliver accurate digitisation of low-level analog signals. A primary use case is replacing legacy 16-bit SAR ADCs in measurement instruments where higher noise rejection is required. When designing with the CS5581, observe the supply decoupling guidance: place 0.1 µF ceramic capacitors close to each analog supply pin and add bulk electrolytic capacitors to suppress switching supply noise. Ensure the analog input common-mode voltage sits within the specified range and that the digital interface lines are length-matched and series-terminated near the host controller to avoid reflections. This page synthesises distributor pricing from DigiKey/Mouser, drop-in alternative MPNs from the same Cirrus Logic family, and practical PCB layout notes that complement the manufacturer datasheet and accelerate design-in decisions.
CS5581-ISZR - 16-Bit 200kSPS Delta-Sigma ADC | Cirrus Logic | 24-SSOP
The Cirrus Logic CS5581-ISZR is a 16-bit, 200 kSPS, single-channel delta-sigma analog-to-digital converter (ADC) housed in a 24-pin SSOP package, designed for high-throughput precision measurement applications. It accepts true bipolar input ranges of ±2.5 V and 0 V to 5 V, providing flexible interfacing with industrial sensors, weigh scales, and process-control transducers. The device combines a charge-balance modulator with a multi-bit digital filter, delivering 16-bit no-missing-code performance with low integral nonlinearity. A delta-sigma ADC is a converter architecture that oversamples an input signal at a rate far higher than the Nyquist frequency, then uses digital filtering and noise shaping to achieve high effective resolution. The CS5581 belongs to the broader category of precision data converters (ADC > data converter > signal chain IC > semiconductor), enabling engineers to capture low-frequency analog signals with sub-LSB accuracy in environments where successive-approximation (SAR) converters would otherwise require expensive front-end signal conditioning. Key features include a serial peripheral interface (SPI-compatible) for compact MCU/DSP connectivity, single-ended analog input architecture, and a charge-balance conversion technique that minimizes front-end analog complexity. The 24-SSOP surface-mount package provides a thermal resistance and PCB footprint compatible with high-density data-acquisition boards, while the tape-and-reel (-ISZR suffix) packaging supports high-volume automated assembly. Architecturally, the CS5581 integrates a chopper-stabilized input stage, a multi-bit modulator, and a decimation filter on a single CMOS die. This integration eliminates external precision components while preserving DC accuracy across the operating range of -40°C to +85°C. The combination of ±2.5 V/5 V bipolar input support and SPI digital interface simplifies the design of multi-channel data-acquisition systems by stacking multiple CS5581 devices on a shared SPI bus. Typical applications include industrial process-control instrumentation, weigh scales and force/pressure transducers, multi-channel data-acquisition systems, portable battery-powered measurement devices, and precision sensor signal conditioning. The device's low power dissipation also makes it suitable for handheld test equipment where energy budget is constrained. When designing with the CS5581, ensure the analog input remains within the specified common-mode range to avoid saturation of the modulator. Decoupling the analog and digital supplies with 0.1 µF ceramic capacitors placed within 5 mm of the supply pins is recommended for optimal noise performance. This page synthesizes distributor stock data, drop-in alternatives, and practical design notes not found in the manufacturer datasheet, providing engineers with actionable information for BOM validation and supply-chain decisions.
DAC-08CQ - 8-Bit High-Speed Multiplying DAC | AMD/Analog Devices
The AMD/Analog Devices DAC-08CQ is an 8-bit monolithic high-speed multiplying digital-to-analog converter that delivers 85 ns settling time with low glitch energy in a 20-pin LCCC (LCC-20) surface-mount package. Operating as a current-output DAC with universal digital logic interface, it accepts standard TTL/CMOS inputs and supports a wide 20:1 reference current range from approximately 0.2 mA to 4 mA. The device provides very high speed performance coupled with low cost and outstanding applications flexibility for both commercial and industrial designs. A multiplying DAC (MDAC) is a digital-to-analog converter whose output is the product of a digital input word and an analog reference current or voltage, enabling four-quadrant multiplication when bipolar references are used. DACs of this class sit within the broader hierarchy of data converters (DAC -> data converter -> mixed-signal IC -> semiconductor) and are distinguished from integrating or sigma-delta types by their inherently high update rates and ability to operate on AC reference signals. Key features of the DAC-08CQ include ±10 ppm/°C typical full-scale output current drift, monotonic multiplying performance over a 20:1 reference current range, low glitch energy, and 1 LSB-accurate matching across the rated operating temperature range. Its advanced bipolar circuit design achieves settling within 85 ns to within ±1/2 LSB for full-scale transitions, while zero-scale output current and drift remain essentially negligible compared to 1/2 LSB. The DAC-08CQ is built on a bipolar process optimized for high-speed current steering, with an internal R-2R-type ladder network and high-impedance current sources that minimize dynamic errors during code transitions. The combination of fast settling and low glitch makes it suitable for video-rate signal generation, waveform synthesis, and digitally controlled calibration systems where step accuracy matters more than absolute DC precision. Typical applications include CRT display systems, precision motor control, audio attenuators, digitally programmable gain stages, function generators, and high-speed automatic test equipment. The wide reference current range also makes it well suited for process-control loops and software-calibrated instrumentation. When designing with this part, pay attention to the reference current source impedance: the DAC's multiplying bandwidth depends on keeping the reference source impedance low (typically under 500 ohm). For high-speed or AC-reference operation, buffer the reference with a low-output-impedance amplifier such as the AD844 to preserve bandwidth. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found on a single manufacturer page, including pin-compatibility guidance across the DAC08 family temperature grades.
DAC38RF83 - Dual 14-Bit 9-GSPS RF-Sampling DAC | TI
The Texas Instruments DAC38RF83 is a high-performance, dual-channel, 14-bit, 9-GSPS RF-sampling digital-to-analog converter (DAC) capable of synthesizing wideband signals from 0 to 4.5 GHz. It integrates a 6x-24x interpolating filter chain, an on-chip PLL (6 GHz and 9 GHz modes), and a JESD204B interface, and is supplied in a 144-pin FCBGA (10x10 mm) package. A digital-to-analog converter (DAC) converts digital binary data into an analog signal. As an RF-sampling DAC, the DAC38RF83 directly synthesizes signals at radio frequencies without an intermediate IF stage, simplifying transceiver architectures. It belongs to the family of high-speed data converters, essential in modern communication systems for bridging the digital and analog domains. Key features include dual 14-bit DAC cores operating at up to 9 GSPS, a flexible interpolation factor from 6x to 24x, an integrated PLL for clock generation, and a JESD204B interface supporting high per-lane data rates. The device offers single-ended or differential output modes, high dynamic range, and programmable output power, enabling direct RF synthesis up to 4.5 GHz while reducing system complexity and component count. The DAC38RF83 utilizes advanced CMOS technology and a high-speed current-steering architecture to achieve excellent spurious-free dynamic range (SFDR) and low noise spectral density. The on-chip PLL and clock multiplier reduce the need for external high-frequency clock sources, while the JESD204B serial interface simplifies PCB layout by minimizing data lines. Multiple operating modes, including real and complex output, plus digital gain and offset adjustment, provide design flexibility. Typical applications include 3G/4G/5G wireless base stations, radar systems, software-defined radio (SDR), and broadband test equipment. The wideband synthesis capability and high dynamic range support complex modulation schemes such as OFDM and wideband spread-spectrum signals. When designing with the DAC38RF83, careful attention must be paid to power supply decoupling and clock jitter, as these directly impact output signal quality. The device requires multiple supply rails (1.0V, 1.8V, 3.3V per family documentation; verify against the datasheet) and a clean reference clock, with controlled-impedance RF output traces.