Códecs de audio
Productos (12)
ADG1436YCPZ-500RL7 - 2Ohm Dual SPDT iCMOS Switch | Analog Devices
The Analog Devices ADG1436YCPZ-500RL7 is a 2 ohm max on-resistance dual SPDT (single-pole double-throw) analog switch manufactured on the iCMOS process, fully specified at +12 V, +/-15 V, and +/-5 V supplies and housed in a 16-lead LFCSP (QFN) package measuring 4 mm x 4 mm. The -500RL7 suffix denotes the automotive temperature grade with tape-and-reel packaging. An analog switch is an electronic component that routes or gates analog signals by opening and closing MOSFET conduction paths under digital logic control. Within the signal-chain hierarchy, switches sit alongside multiplexers and demultiplexers as building blocks of analog signal routing, feeding signal conditioners, ADCs, and instrumentation front ends. Switches such as the ADG1436 form the interface layer between mixed-signal controllers and the analog world. Key features of the ADG1436 include a maximum on-resistance of 2 ohm, 0.1 ohm on-resistance match between channels, 0.5 ohm max on-resistance flatness, and continuous current per channel of up to 400 mA in the LFCSP package (260 mA in the TSSOP variant). The device operates over a 33 V supply range and requires no VL logic supply - 3 V logic-compatible inputs work directly, simplifying interfacing with low-voltage controllers in high-voltage systems. The iCMOS process technology combines high-voltage CMOS with submicron geometry, enabling rail-to-rail switching operation with high-voltage supplies while keeping quiescent power very low. Each of the two independently selectable SPDT switches is controlled by its own IN logic pin, and on the LFCSP package an EN input disables all channels when asserted, reducing power consumption in idle states. Typical applications cited in the manufacturer datasheet include automatic test equipment, data acquisition systems, sample-and-hold circuits, audio signal routing, communication systems, relay replacement, and battery-powered systems. When designing with this part, account for on-resistance in series with the signal path: at 400 mA continuous current, a 2 ohm switch dissipates roughly 0.32 W, so PCB copper around the LFCSP leads matters. Keep the EN pin logic levels within the 3 V-compatible input threshold range for reliable channel selection. This page synthesizes drop-in alternatives, distributor sourcing context, and practical design notes not found in the manufacturer datasheet, providing engineers a single citable reference for the ADG1436YCPZ-500RL7.
DG412 - Quad SPST CMOS Analog Switch 44V | Analog Devices
The Analog Devices DG412 (originally Maxim Integrated) is a precision monolithic quad SPST CMOS analog switch with four independent single-pole single-throw switches, a maximum supply rating of 44 V, a +/-15 V analog signal range, and on-resistance of 35 to 45 ohm depending on manufacturer grade, housed in a 16-pin SOIC package. An analog switch is a semiconductor device that passes or blocks an analog signal under digital control, acting as a relay replacement without moving parts. Within the signal-path hierarchy, the analog switch sits under signal switching ICs, itself a branch of interface and signal-conditioning semiconductors. Quad SPST devices such as the DG412 integrate four independent switches on one die, letting one logic-controlled part replace four discrete transistor-level switching circuits while preserving signal integrity. Key features include TTL- and CMOS-compatible logic inputs, fast switching with turn-on time around 110 ns per the original datasheet family, ultra-low power dissipation near 0.35 mW quiescent, and improved on-resistance matching between switches of 3 ohm max with guaranteed rDS(on) flatness over the signal range of 4 ohm max in the redesigned Maxim version. The wide 44 V absolute maximum supply rating supports +/-15 V industrial analog rails. Architecturally, the DG412 family uses monolithic CMOS transmission-gate switches with internal level shifting, allowing a single 5 V logic signal to control signals swinging to +/-15 V. Drop-in compatibility with the older DG211/DG212 series simplifies legacy redesigns. Typical applications include audio signal routing, precision test-and-measurement multiplexing, data-acquisition front ends, sample-and-hold circuits, and industrial signal switching where relay-free switching is required. Design consideration: keep control-input logic levels within datasheet limits and observe the analog signal range so switches never see signals beyond the supply rails, which would turn on protection structures and distort the signal. This page synthesizes distributor pricing, verified drop-in alternatives from Analog Devices, Renesas and Vishay, and practical design notes not found in the manufacturer datasheet.
DP83TC816RHARQ1 - 100Base-T1 Automotive Ethernet PHY | TI
The Texas Instruments DP83TC816RHARQ1 is an automotive-qualified 100Base-T1 Ethernet physical layer transceiver with IEEE 802.1AS gPTP support, AVB clock generation, and TC10 Sleep-Wake, compliant with IEEE 802.3bw and the Open Alliance, housed in a 36-pin VQFN package. It transmits and receives 100 Mbps data over a single unshielded or shielded twisted-pair cable with xMII interface flexibility. An Ethernet PHY (physical layer transceiver) is the IC that connects a media access controller (MAC) to the physical cabling of a network. In the automotive network hierarchy, the PHY sits between the MAC integrated in a SoC or gateway processor and the single twisted-pair (STP/UTP) wiring harness, performing encoding, decoding, clock recovery, equalization, and link diagnostics as defined by the 100Base-T1 standard (IEEE 802.3bw, formerly Broadcom BroadR-Reach). Key features include RGMII and SGMII MAC interface options, AVB (Audio Video Bridging) clock generation for deterministic in-vehicle networking, IEEE 802.1AS time synchronization support, and TC10 Sleep-Wake power management for network standby. Automotive AEC-Q100-grade qualification per the -Q1 suffix makes it suitable for in-vehicle deployment across extended temperature ranges. Architecturally, the device integrates the full analog front end - line drivers, receivers, echo canceller, adaptive equalizer, and clock recovery loop - plus a digital baseband engine and flexible PLL/clock synthesis block, allowing a single crystal to generate gPTP-aligned reference clocks for media playback and camera synchronization. Typical applications include automotive gateway ECUs, ADAS camera and radar domains, infotainment head units, and zonal body controllers that require 100 Mbps single-pair Ethernet links with synchronized AVB traffic. Design consideration: verify MAC interface mode selection (RGMII vs SGMII) at reset strapping early in the project, since this determines both the PCB routing plan and clock topology. This page synthesizes distributor sourcing data, same-family drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
ISD8104RYI - 2W Class AB Audio Amplifier | Nuvoton
The Nuvoton ISD8104RYI is a 2W mono Class AB audio power amplifier IC with differential input pair and chip enable, manufactured by Nuvoton Technology Corporation. The RYI suffix denotes the SOP-8 surface-mount package with exposed thermal pad option family, and the device integrates a single-channel (mono) amplifier output stage in a compact 8-pin footprint. A Class AB audio amplifier is a linear power amplifier topology in which output transistors conduct continuously through the signal cycle, combining the low distortion of Class A designs with the improved efficiency of Class B. Within the power management and audio signal chain hierarchy, it sits downstream of DACs or codec outputs and upstream of the loudspeaker, converting line-level analog signals into speaker-drive-capable power. The ISD8104 belongs to Nuvoton's ISD audio amplifier product line, alongside the ISD8102, which differs by offering an earphone-sense input (SE/Diff) instead of a dedicated differential input pair. Key features include 2W output power at mono Class AB operation, a true differential input pair that rejects common-mode noise picked up on the PCB, and a chip enable (CE) pin that allows the system controller to shut the amplifier down and minimize standby current draw in battery-powered products. The differential input architecture is significant for designs where the amplifier sits far from the signal source, such as alarm panels or appliance panels. The Class AB output stage provides low crossover distortion, important for voice-band announcement and alerting audio where intelligibility matters more than maximum efficiency. Typical applications include doorbell and intercom systems, industrial alarm sounders, small appliance voice prompts, toys, and battery-powered notification devices. When designing with the ISD8104RYI, consult the manufacturer datasheet for gain-setting resistor values, supply voltage limits, and the thermal pad soldering requirements, since power dissipation in a 2W Class AB stage depends strongly on supply voltage and load impedance. This page synthesizes distributor listings, same-family drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
ISD9361RI - Serial Voice Record/Playback IC, 64-LQFP | Nuvoton
The Nuvoton Technology ISD9361RI is a serial-interface voice record and playback IC (Message Serial series) supplied in a 64-pin LQFP package measuring 7 x 7 mm, rated for an operating temperature range of -40C to +85C. The device integrates the analog audio front end and message management logic required to record and play back voice messages under serial control from a host microcontroller. A voice record and playback IC is a mixed-signal audio device that converts microphone input into stored digital audio and converts stored digital data back into analog sound using an integrated codec, speaker driver interface, and message indexing engine. Such devices sit within the broader hierarchy of audio codec ICs and human-machine-interface semiconductors, where they offload audio capture and playback tasks from the main processor. Key features of the ISD9361RI include its serial host interface, message-based storage architecture for indexed voice segments, integrated record and playback paths, industrial-grade temperature rating from -40C to +85C, and a compact 7 x 7 mm 64-LQFP surface-mount package that suits dense PCB layouts. The message-serial architecture allows a host controller to address individual voice messages, enabling prompt-driven user interfaces without streaming raw audio data over the bus. Technically, the device combines an analog front end for microphone and line inputs with a digital message-management core, providing self-contained record/playback sequencing. Host controllers issue serial commands to trigger specific messages, simplifying firmware in applications that only need canned announcements or prompt playback. Typical applications include industrial equipment voice annunciators, medical device audible prompts, security and alarm announcement panels, elevator and building-automation voice prompts, and consumer appliance user interfaces. Design consideration: because the ISD9361RI is officially listed as obsolete, new designs should secure long-term stock or plan a successor strategy before committing to this part; verify message storage duration and audio bandwidth against the manufacturer datasheet. This page synthesizes distributor stock data, lifecycle status, and sourcing guidance for an obsolete Nuvoton voice IC - information not consolidated in the manufacturer datasheet.
MAX4062EUB+ - Differential Mic Preamplifier, 2.4V-5.5V | Maxim
The Analog Devices (Maxim Integrated) MAX4062EUB+ is a differential-input microphone preamplifier with internal bias and complete shutdown, operating from a 2.4V to 5.5V single supply in a 10-pin uMAX (uSOP/MSOP) package. It provides adjustable gain with excellent power-supply rejection ratio (PSRR) and common-mode rejection ratio (CMRR), and integrates a low-noise microphone bias source, eliminating external bias components in voice-band signal chains. A differential microphone preamplifier is a small-signal audio amplifier that senses the voltage difference between an electret or MEMS microphone's output terminals and rejects common-mode interference picked up on the microphone lines. Within the signal-chain hierarchy (sensor -> preamplifier -> ADC/codec -> baseband), the microphone preamplifier is the first analog gain stage and largely determines the noise floor and dynamic range of a voice recording path. Differential input architectures are preferred in portable electronics because handset wiring is short, high-impedance, and exposed to RF and display noise. Key features of the MAX4062EUB+ include the integrated microphone bias generator, rail-to-rail output stage (Class AB per DigiKey categorization), complete shutdown for power savings in battery-operated systems, adjustable gain set by external resistors, and industrial temperature grade. The wide 2.4V to 5.5V supply range allows direct operation from a single Li-ion cell or a 3.3V/5V rail without a dedicated regulated supply. Architecturally, the device belongs to the MAX4060/MAX4061/MAX4062 family; the MAX4062 variant is the member with internal bias and complete shutdown. Excellent PSRR and CMRR keep display, RF, and switching-regulator noise out of the microphone path, a critical attribute for low-noise portable audio as stated in the Maxim/ADI datasheet general description. Typical applications are notebook PC microphone inputs, PDA voice recorders, smartphone/handset voice paths, and VoIP headsets - any battery-powered system where a differential electret or MEMS microphone must be amplified and biased from a limited power budget. Design-wise, set the gain with the external feedback resistors and verify that the bias source can supply the chosen microphone's current; place the bias-decoupling capacitor close to the bias pin to preserve noise performance. This page synthesizes distributor listing data, family cross-references, and practical design notes beyond what a plain datasheet mirror provides, with pricing as of 2026-10-12.
MC33742PEPR2 - SBC w/ CAN, 2x LDO, 4 Wake | NXP | QFN-48
The NXP MC33742PEPR2 is a monolithic System Basis Chip (SBC) for automotive ECU applications, integrating a high-speed CAN interface, two 5.0 V/200 mA low-dropout regulators, four wake-up inputs, and a 15 ms reset circuit in a single 48-pin QFN-EP (7x7) package. A System Basis Chip is a category of mixed-signal automotive IC that combines multiple power, communication, and supervisory functions that previously required several discrete components around an automotive microcontroller. Within the broader hierarchy, an SBC belongs to the power management and in-vehicle networking ecosystem alongside transceivers, voltage regulators, and watchdog supervisors. By collapsing these functions into one die, the MC33742 reduces PCB area, simplifies wiring harness interfaces, and helps automakers meet stringent quiescent-current budgets for modules that must remain in a low-power state when the vehicle is parked. Key features include a fixed 5.0 V/200 mA LDO with current limit and overtemperature pre-warning, a second auxiliary 5.0 V regulator for sensor or communication supplies, four independent wake-up inputs that allow the ECU to exit Sleep mode from local events such as door-switch transitions or sensor edges, a high-speed CAN physical layer capable of 1 Mb/s operation, and a programmable reset generator with 15 ms duration. Internal protection covers thermal shutdown, watchdog timer, and battery voltage monitoring. The device uses a mixed bipolar-CMOS process with an integrated charge pump and high-side drivers to support the CAN bus recessive/dominant drive symmetry. Its Sleep mode draws a very low quiescent current, allowing body and chassis ECUs to meet the < 100 µA sleep-current targets expected by major OEMs. Compared with discrete solutions, the SBC eliminates inter-IC glue logic and improves ESD/EMC robustness because all sensitive pins are co-located on a controlled silicon substrate. Typical applications include HVAC control modules, body control modules, instrument clusters, door modules, and seat control units in 12 V automotive systems (5 V/9 V/12 V/15 V/18 V/24 V nominal battery compatibility per the datasheet). The integrated CAN interface makes it a natural fit for powertrain-adjacent and chassis nodes where HS-CAN is the dominant backbone. For design, attach the exposed thermal pad to a continuous ground copper pour with multiple thermal vias. Place the two decoupling capacitors (one per LDO) directly at their respective output pins to keep load transients within regulation. This page consolidates distributor pricing, drop-in compatible alternatives, and design guidance not bundled in the original 2004-vintage datasheet, giving procurement engineers and PCB designers a single practical reference.
NAU8811YG - 24-bit Mono Audio Codec with SPI | Nuvoton
The Nuvoton NAU8811YG is a cost-effective, low-power wideband mono audio codec with 24-bit I2S audio interface and SPI control, housed in a 20-pin QFN (4x4 mm) package with exposed pad. It integrates one ADC channel and one DAC channel (24-bit resolution) for voice telephony and audio recording/playback applications. An audio codec (coder-decoder) is a mixed-signal IC that converts analog audio signals to digital data and vice versa. In the system hierarchy, an audio codec sits between analog transducers (microphones, speakers, line outputs) and a digital processor such as a DSP or application MCU, providing the ADC path, DAC path, and an industry-standard digital audio bus such as I2S or PCM in a single power-management-friendly device. Key features include an Automatic Level Control (ALC) with noise gate that keeps recorded voice levels consistent without host intervention, a programmable gain amplifier (PGA) on the record path, and a differential microphone input plus a single-ended auxiliary input that can sum multiple signals. Three amplification paths with total gain of up to [DATA_NEEDED: total gain value] support flexible signal conditioning. The digital audio interface supports both I2S and PCM with time-slot assignment, easing integration with cellular basebands and Bluetooth controllers. Architecturally, the NAU8811 pairs robust sigma-delta conversion with an on-chip clocking scheme controlled over SPI, minimizing external component count. Its low-power design targets battery-operated voice terminals where every microamp matters. According to the Nuvoton NAU8811 datasheet (Rev 2.5), the device is explicitly designed for voice-telephony-related applications, with wideband performance suitable for modern voice codecs. Typical applications include hands-free car kits, VoIP headsets and speakerphones, portable voice recorders, intercom systems, and cellular accessories where one differential mic input and one mono output are sufficient. A key design consideration: because the AUX input is multipurpose and can be configured to sum multiple signals, careful gain staging across the PGA and ALC is required to avoid clipping on loud transients; set the ALC target level below the ADC full-scale range. This page synthesizes distributor stock data, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
NAU8822LYG - 24-bit Stereo Audio Codec | Nuvoton | QFN-32
The Nuvoton NAU8822LYG is a low-power, high-quality 24-bit stereo audio codec with integrated speaker driver, housed in a 32-pin QFN (5x5 mm) package with I2S/PCM audio interface, precision 24-bit stereo ADC and DAC conversion, and operation over -40C to +85C. An audio codec (coder-decoder) is a mixed-signal integrated circuit that converts analog audio signals to digital data and digital audio data back to analog. Within the system hierarchy, a codec sits between analog transducers such as microphones, headphones, and speakers, and a digital processing host such as an application processor, microcontroller, or FPGA. Codecs combine ADCs, DACs, microphone preamplifiers, headphone amplifiers, mixers, and volume controls in one silicon solution, making them the core building block of any embedded audio subsystem. Key features of the NAU8822LYG include precision 24-bit stereo ADC and DAC channels for high dynamic-range record and playback, an integrated speaker driver that can drive a speaker directly without an external amplifier, and a standard I2S/PCM digital audio interface for glueless connection to mainstream processors. A broad range of integrated functions - mixing, gain staging, and input/output routing - simplifies implementation of complete audio system solutions on a single chip. Architecturally, the NAU8822L family is designed as a complete audio subsystem: low-power analog front ends feed the sigma-delta converters, while flexible digital mixing and volume control operate on the audio bus side. This integration reduces component count, board area, and analog design effort compared with discrete codec-plus-amplifier chains. Typical applications include portable audio players and recorders, smartphone and tablet headset audio, hands-free speakerphone systems using the built-in speaker driver, and general-purpose embedded audio in industrial equipment. The low-power design targets battery-operated products where every milliamp matters. Design consideration: provide a clean analog supply and follow the manufacturer layout guidance for ground separation between analog and digital sections to preserve the 24-bit converters' noise performance. This page synthesizes distributor pricing (LCSC from $2.0171 as of 2026-10-11), package and interface data, drop-in family alternatives, and practical design notes not found in the manufacturer datasheet.
TCAN1051GVDRQ1 - 5Mbps CAN FD Transceiver AEC-Q100 | TI
The Texas Instruments TCAN1051GVDRQ1 is an automotive fault-protected CAN transceiver with flexible data-rate (CAN FD) support up to 5 Mbps, operating from a 4.5 V to 5.5 V supply and housed in an 8-pin SOIC (D) package rated from -55C to +125C. A CAN (Controller Area Network) transceiver is a physical-layer interface IC that converts the logic-level TXD and RXD signals of a CAN controller into the differential CANH/CANL bus signals. Within the power-management and interface hierarchy, the transceiver sits between the host microcontroller and the twisted-pair bus, defining bus timing, fault tolerance, and ESD robustness. CAN FD (Flexible Data-rate) extends classical CAN by allowing faster bit rates during the data phase, which this device supports at up to 5 Mbps. Key features include AEC-Q100 automotive qualification, flexible data-rate operation, integrated fault protection on the CANH/CANL bus pins, and a separate VIO pin that lets the I/O side interface with 3.3 V or 5 V microcontrollers while the transceiver core runs at 5 V. The GV variant designation indicates the VIO-capable version without standby/sleep mode, simplifying designs that do not require low-power bus monitoring. Technically, the device integrates dominant/short-circuit protection, bus fault detection, and thermal shutdown behavior typical of TI's TCAN1051 family, protecting the transceiver against wiring faults to battery, ground, or other bus lines. The differential receiver architecture maintains receiver timing margins over the full -55C to +125C automotive temperature range, and the SOIC-8 footprint simplifies layout with the standard CAN transceiver pin ordering (TXD, GND, VCC, RXD, VIO, CANL, CANH). Typical applications include automotive body control modules, gateways, electric powertrain and battery management nodes, and industrial CAN networks where the 5 Mbps CAN FD data phase shortens frame transmission times versus classical 500 kbps CAN. Design consideration: keep the stub length from transceiver to bus connector short and use a split-termination network (typically two 60-ohm resistors with a capacitor to ground) for best EMC performance; never omit the 100 nF decoupling capacitor close to VCC. This page synthesizes distributor pricing from DigiKey, Mouser, LCSC and Octopart, same-package drop-in alternatives, and practical design notes not consolidated in the manufacturer datasheet.
TCAN1051HGVDRQ1 - 5Mbps CAN FD Transceiver AEC-Q100 | TI
The Texas Instruments TCAN1051HGVDRQ1 is an automotive fault-protected CAN flexible data-rate (CAN FD) transceiver supporting data rates up to 5 Mbps, supplied at 4.5 V to 5.5 V, housed in an 8-pin SOIC (D) package rated for -55C to +125C operation. A CAN FD transceiver is a physical-layer interface IC that converts the TTL-level transmit (TXD) and receive (RXD) signals of a CAN controller into the differential CANH/CANL bus signals, and vice versa. Within the signal-chain hierarchy, it sits between the host microcontroller or CAN controller and the twisted-pair bus, defining the robustness, bus-fault tolerance, and data-rate ceiling of the entire network node. Key features of the TCAN1051HGVDRQ1 include CAN FD support up to 5 Mbps for fast arbitration-free data phases, automotive AEC-Q100 qualification, fault-protected bus pins that survive electrical faults on CANH and CANL, and a standby mode with bus-wake capability for low quiescent power. The VIO pin allows I/O-level adaptation to 3.3 V controllers, and the device provides dominant-timeout protection and thermal shutdown for system-level robustness. Technically, the transceiver drives a differential bus compliant with high-speed CAN physical-layer requirements while adding fault protection that distinguishes the HGV variant: bus pins tolerate sustained overvoltage and short-circuit events that would destroy a standard transceiver. An internal receiver filters and shapes the bus signal, and the STB pin (pin 8) selects operating modes, enabling standby operation with wake-up via bus activity. Typical applications include automotive body control modules, gateways, and powertrain nodes; industrial CANopen networks requiring fault tolerance; and battery management systems where bus wiring faults are credible failure modes. High CAN FD data rates make the part suitable for modern zonal architectures. Design consideration: local bus termination and placement of 100 nF to 470 nF VCC decoupling directly at pin 3 strongly influence signal integrity at 5 Mbps; keep the TXD/RXD traces short and reference them to a clean ground. This page synthesizes distributor pricing, drop-in alternatives, pinout data, and practical design notes not found in the manufacturer datasheet.
WAU8812YG - Mono Audio Codec + Speaker Driver | Nuvoton
The Nuvoton WAU8812YG is a mono audio codec with integrated speaker driver, housed in a 32-pin QFN-EP (5x5 mm) package. It features one ADC and one DAC channel with typical signal-to-noise ratios of 91 dB (ADC) and 93 dB (DAC), and communicates over a serial audio data interface. An audio codec (coder-decoder) is an integrated circuit that converts analog audio signals to digital form via an ADC and converts digital audio back to analog via a DAC, while providing auxiliary functions such as microphone biasing, volume control, mixing, and in this case a built-in class speaker driver. Codecs sit between analog transducers (microphones, speakers) and digital processors such as MCUs or SoCs in the embedded audio signal chain, typically interfacing through an I2S-style serial port and a control bus for register configuration. The defining feature of the WAU8812YG is its integrated speaker driver: unlike a bare codec that requires an external amplifier stage, this device can drive a speaker directly, reducing BOM count, board area, and design effort in cost-sensitive voice applications. The 91/93 dB S/N ratio provides adequate fidelity for speech-band and compact audio playback. Architecturally, the part combines a sigma-delta-style conversion path with on-chip gain stages and mixing, configurable through serial control registers. The exposed-pad 32-QFN package improves thermal dissipation for the speaker driver stage and supports compact surface-mount layouts. Typical applications include doorbell and intercom voice units, IP phone and handset audio, smart-home voice terminals, alarm and announcement systems, and portable voice-recording devices where a single mono channel with direct speaker drive suffices. A key design consideration is thermal management: driving a speaker continuously at high output power increases die temperature, so PCB copper connected to the exposed pad should be sized according to the driver output level. Series ferrite beads on speaker lines reduce EMI radiated from switching drive currents. This page adds distributor-verified availability, alternatives context, application guidance, and design notes that go beyond the raw Nuvoton datasheet content.