EP1M120F484I6M vs EP1M120F48I6 Comparación
Comparación detallada lado a lado de EP1M120F484I6M por Altera y EP1M120F48I6 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1M120F484I6M | EP1M120F48I6 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $325,00 | $158,00 |
| Family | Mercury (EP1M) | Mercury (Altera) |
| Logic Elements | 120,000 | — |
| System Gates | 480,000 (typical) | 120,000 |
| LABs / CLBs | 303 | — |
| Flip-Flops | 49,152 | — |
| Embedded Memory (Bits) | 4,800 Kb (480 Kbits) | — |
| Package Type | 484-Ball FCBGA | — |
| Package Code | BGA, 484 balls, Fine-pitch | BGA, Square |
| Package Shape | Square | — |
| Terminal Form | Ball | Ball |
| Temperature Grade | Industrial | Industrial |
| Speed Grade | -6 (slowest Mercury timing bin) | -6 |
| Tensión de alimentación | 1.5 V core / 3.3 V aux (per Mercury datasheet) | — |
| I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, LVDS | — |
| Clock Management | PLLs (per Mercury family) | — |
| Boundary-Scan | IEEE 1149.1 / JTAG | — |
| Estado RoHS | Compliant (M revision) | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 4800 |
| Total User I/O | — | 303 |
| Number of Pins / Terminals | — | 484 |
| Encapsulado | — | 484-BBGA, FCBGA |
| Temperatura de funcionamiento | — | -40C to +100C |
| Core Voltage | — | 1.8 V |
| Transceiver Channels (max) | — | 8 channels at 1.25 Gbps; remaining 10 channels at <=1.0 Gbps |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, LVDS |
| Tipo de memoria | — | Embedded SRAM / dual-port RAM blocks |