EP1M120F484I6M vs EP1M120F48I6 Comparaison
Comparaison détaillée côte à côte de EP1M120F484I6M par Altera et EP1M120F48I6 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1M120F484I6M | EP1M120F48I6 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $325,00 | $158,00 |
| Family | Mercury (EP1M) | Mercury (Altera) |
| Logic Elements | 120,000 | — |
| System Gates | 480,000 (typical) | 120,000 |
| LABs / CLBs | 303 | — |
| Flip-Flops | 49,152 | — |
| Embedded Memory (Bits) | 4,800 Kb (480 Kbits) | — |
| Package Type | 484-Ball FCBGA | — |
| Package Code | BGA, 484 balls, Fine-pitch | BGA, Square |
| Package Shape | Square | — |
| Terminal Form | Ball | Ball |
| Temperature Grade | Industrial | Industrial |
| Speed Grade | -6 (slowest Mercury timing bin) | -6 |
| Tension d'alimentation | 1.5 V core / 3.3 V aux (per Mercury datasheet) | — |
| I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, LVDS | — |
| Clock Management | PLLs (per Mercury family) | — |
| Boundary-Scan | IEEE 1149.1 / JTAG | — |
| Statut RoHS | Compliant (M revision) | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 4800 |
| Total User I/O | — | 303 |
| Number of Pins / Terminals | — | 484 |
| Boîtier | — | 484-BBGA, FCBGA |
| Température de fonctionnement | — | -40C to +100C |
| Core Voltage | — | 1.8 V |
| Transceiver Channels (max) | — | 8 channels at 1.25 Gbps; remaining 10 channels at <=1.0 Gbps |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, LVDS |
| Type de mémoire | — | Embedded SRAM / dual-port RAM blocks |