EP1S10F780C6 vs EP1S10F780C6N Comparación
Comparación detallada lado a lado de EP1S10F780C6 por Altera y EP1S10F780C6N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S10F780C6 | EP1S10F780C6N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $118,00 | $205,00 |
| Series | Stratix (EP1S) | — |
| Family | Stratix I | Stratix |
| Logic Elements / Cells | 10,570 | — |
| LABs / CLBs | 1,057 | — |
| Total RAM Bits | 920,448 | — |
| Number of I/O | 426 | — |
| Package Type | 780-BBGA (FC-FBGA, 29x29 mm, 1.0 mm pitch) | — |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Temperatura de funcionamiento | 0C to +85C (commercial 'C') | 0 C to +85 C (Commercial) |
| Speed Grade | C6 | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | — |
| Multipliers | [DATA_NEEDED: embedded multiplier count] | — |
| PLLs / DLLs | [DATA_NEEDED: PLL and DLL count] | — |
| Max User I/O | 426 | — |
| Tipo de montaje | Surface Mount (SMT/SMD) | Surface Mount |
| Logic Family / Base Technology | CMOS, SRAM-based configuration | — |
| Configuration Mode | JTAG / passive serial / external flash | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (LEAD FR finish per AiPCBA datasheet) |
| Logic Elements (LEs) | — | 10,570 |
| Configurable Logic Blocks (CLBs) | — | 1,200 |
| Embedded Memory | — | 920 Kbit (TriMatrix) |
| I/O Supply Voltage | — | Multi-voltage (3.3 V / 2.5 V / 1.8 V LVTTL/LVCMOS, LVDS) |
| Maximum Internal Clock Frequency | — | 450.05 MHz |
| Encapsulado | — | FBGA-780 (29 x 29 mm, 1.0 mm pitch) |
| Pin / Ball Count | — | 780 |
| User I/O Count | — | 426 (per FindIC) |
| Logic Family | — | CMOS |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous |
| Lead Finish | — | SnPb (LEAD FR / non-RoHS variant) |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |