EP1S10F780C6 vs EP1S10F780C6N Comparaison
Comparaison détaillée côte à côte de EP1S10F780C6 par Altera et EP1S10F780C6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S10F780C6 | EP1S10F780C6N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $118,00 | $205,00 |
| Series | Stratix (EP1S) | — |
| Family | Stratix I | Stratix |
| Logic Elements / Cells | 10,570 | — |
| LABs / CLBs | 1,057 | — |
| Total RAM Bits | 920,448 | — |
| Number of I/O | 426 | — |
| Package Type | 780-BBGA (FC-FBGA, 29x29 mm, 1.0 mm pitch) | — |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Température de fonctionnement | 0C to +85C (commercial 'C') | 0 C to +85 C (Commercial) |
| Speed Grade | C6 | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | — |
| Multipliers | [DATA_NEEDED: embedded multiplier count] | — |
| PLLs / DLLs | [DATA_NEEDED: PLL and DLL count] | — |
| Max User I/O | 426 | — |
| Type de montage | Surface Mount (SMT/SMD) | Surface Mount |
| Logic Family / Base Technology | CMOS, SRAM-based configuration | — |
| Configuration Mode | JTAG / passive serial / external flash | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (LEAD FR finish per AiPCBA datasheet) |
| Logic Elements (LEs) | — | 10,570 |
| Configurable Logic Blocks (CLBs) | — | 1,200 |
| Embedded Memory | — | 920 Kbit (TriMatrix) |
| I/O Supply Voltage | — | Multi-voltage (3.3 V / 2.5 V / 1.8 V LVTTL/LVCMOS, LVDS) |
| Maximum Internal Clock Frequency | — | 450.05 MHz |
| Boîtier | — | FBGA-780 (29 x 29 mm, 1.0 mm pitch) |
| Pin / Ball Count | — | 780 |
| User I/O Count | — | 426 (per FindIC) |
| Logic Family | — | CMOS |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous |
| Lead Finish | — | SnPb (LEAD FR / non-RoHS variant) |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |