EP1S10F780C6 vs EP1S10F780C6N 对比

详细并排对比 EP1S10F780C6 出自 Altera 和 EP1S10F780C6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S10F780C6 EP1S10F780C6N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $118.00 $205.00
Series Stratix (EP1S) —
Family Stratix I Stratix
Logic Elements / Cells 10,570 —
LABs / CLBs 1,057 —
Total RAM Bits 920,448 —
Number of I/O 426 —
Package Type 780-BBGA (FC-FBGA, 29x29 mm, 1.0 mm pitch) —
Core Supply Voltage 1.5 V 1.5 V
Process Technology 130 nm CMOS 130 nm CMOS
工作温度 0C to +85C (commercial 'C') 0 C to +85 C (Commercial)
Speed Grade C6 —
DSP Blocks [DATA_NEEDED: number of DSP blocks] —
Multipliers [DATA_NEEDED: embedded multiplier count] —
PLLs / DLLs [DATA_NEEDED: PLL and DLL count] —
Max User I/O 426 —
安装类型 Surface Mount (SMT/SMD) Surface Mount
Logic Family / Base Technology CMOS, SRAM-based configuration —
Configuration Mode JTAG / passive serial / external flash —
RoHS 状态 [DATA_NEEDED: RoHS status] Non-compliant (LEAD FR finish per AiPCBA datasheet)
Logic Elements (LEs) — 10,570
Configurable Logic Blocks (CLBs) — 1,200
Embedded Memory — 920 Kbit (TriMatrix)
I/O Supply Voltage — Multi-voltage (3.3 V / 2.5 V / 1.8 V LVTTL/LVCMOS, LVDS)
Maximum Internal Clock Frequency — 450.05 MHz
封装 — FBGA-780 (29 x 29 mm, 1.0 mm pitch)
Pin / Ball Count — 780
User I/O Count — 426 (per FindIC)
Logic Family — CMOS
Configuration Interface — JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous
Lead Finish — SnPb (LEAD FR / non-RoHS variant)
MSL 等级 — [DATA_NEEDED: MSL rating]

数据手册与资源

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