EP1S40F1020C5N vs EP1S40F1020C5GA Comparación
Comparación detallada lado a lado de EP1S40F1020C5N por Intel y EP1S40F1020C5GA por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EP1S40F1020C5N | EP1S40F1020C5GA |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $280,00 | $171,00 |
| Family | Stratix | — |
| Logic Elements (LE) | 41,250 | 41,250 |
| Logic Array Blocks (LAB) | 4,125 | — |
| Embedded Memory Bits | 3,423,744 | — |
| Maximum User I/Os | 773 | — |
| Process Technology | 130 nm CMOS | — |
| Core Voltage | 1.5 V | — |
| Maximum Internal Frequency | 500 MHz | — |
| Speed Grade | C5 (commercial, slowest) | C5 |
| Temperature Grade | Commercial Extended | — |
| Encapsulado | 1020-ball FBGA (FineLine BGA) | 1020-BBGA (FineLine BGA) |
| Tipo de montaje | Surface Mount | Surface Mount |
| PLLs | Yes (multiple, enhanced PLL) | — |
| DSP Blocks | Yes (embedded multiplier blocks) | Embedded multiplier blocks (count per Stratix datasheet family) |
| External Memory Support | DDR SDRAM, QDR SRAM, FCRAM, ZBT | — |
| Configuration Scheme | Passive serial, active serial, JTAG | — |
| Estado RoHS | Unknown - verify with manufacturer | Unknown - non-GA suffix commercial part |
| Lead-Free | Unknown | Yes (per Altera/Intel policy at release) |
| Series | — | Stratix |
| Total RAM Bits | — | 3,423,744 |
| User I/O Count | — | 773 |
| Temperatura de funcionamiento | — | 0C to +85C (Commercial) |
| Process Node | — | 0.13 µm CMOS with 9-layer metal |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCCINT value] |
| I/O Bank Count | — | [DATA_NEEDED: bank count] |
| PLL Count | — | Up to 12 enhanced PLLs (per Stratix family) |
| High-Speed Transceivers | — | Up to 12 channels (per Stratix family, variant dependent) |
| Configuration Method | — | JTAG, Passive Serial, Altera EPC device |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |